TDA8933BTW/N2,118

Manufacturer Part NumberTDA8933BTW/N2,118
DescriptionIC AMP AUDIO CLASS D 32HTSSOP
ManufacturerNXP Semiconductors
TypeClass D
TDA8933BTW/N2,118 datasheets
 


Specifications of TDA8933BTW/N2,118

Output Type1-Channel (Mono) or 2-Channel (Stereo)Max Output Power X Channels @ Load20.6W x 1 @ 16 Ohm; 10.3W x 2 @ 8 Ohm
Voltage - Supply10 V ~ 36 V, ±5 V ~ 18 VFeaturesDepop, Differential Inputs, Mute, Short-Circuit and Thermal Protection
Mounting TypeSurface MountPackage / Case32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther names935285222118
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TDA8933B
Class D audio amplifier
Rev. 01 — 23 October 2008
1. General description
The TDA8933B is a high-efficiency class D amplifier with low power dissipation.
The continuous time output power is 2
(R
= 8 ) or 1
L
dissipation the device can be used without any external heat sink when playing music.
Due to the implementation of Thermal Foldback (TF) the device remains operating with
considerable music output power without the need for an external heat sink, even for high
supply voltages and/or lower load impedances.
The device has two full differential inputs driving two independent outputs. It can be used
in a mono full-bridge configuration (Bridge-Tied Load (BTL)) or as stereo half-bridge
configuration (Single-Ended (SE)).
2. Features
I
Operating voltage from 10 V to 36 V asymmetrical or 5 V to 18 V symmetrical
I
Mono bridge-tied load (full-bridge) or stereo single-ended (half-bridge) application
I
Application without heat sink using thermally enhanced small outline package
I
High efficiency and low-power dissipation
I
Thermal foldback to avoid audio holes
I
Current limiting to avoid audio holes
I
Full short circuit proof across load and to supply lines (using advanced current
protection)
I
Internal or external oscillator (master-slave setting) that can be switched
I
No pop noise
I
Full differential inputs
3. Applications
I
Flat-panel television sets
I
Flat-panel monitor sets
I
Multimedia systems
I
Wireless speakers
I
Mini/micro systems
I
Home sound sets
10 W in a stereo half-bridge application
20 W in a mono full-bridge application (R
Preliminary data sheet
=16 ). Due to the low power
L

TDA8933BTW/N2,118 Summary of contents

  • Page 1

    TDA8933B Class D audio amplifier Rev. 01 — 23 October 2008 1. General description The TDA8933B is a high-efficiency class D amplifier with low power dissipation. The continuous time output power ...

  • Page 2

    ... NXP Semiconductors 4. Quick reference data Table 1. General; V Symbol Parameter q(tot) Stereo SE channel o(RMS) Mono BTL channel o(RMS) [ the total series resistance of an inductor and an ESR single-ended capacitor in the application. s [2] Output power is measured indirectly, based Ordering information Table 2. Ordering information Type number ...

  • Page 3

    ... NXP Semiconductors 6. Block diagram OSCREF 10 OSCILLATOR 2 IN1P V SSD 3 IN1N 12 INREF 15 IN2P 14 IN2N PROTECTIONS: OVP, OCP, OTP, 4 DIAG 7 CGND 6 POWERUP 5 ENGAGE 13 TEST Fig 1. Block diagram TDA8933B_1 Preliminary data sheet OSCIO 31 PWM MODULATOR MANAGER PWM MODULATOR UVP, TF, WP MODE TDA8933BTW 9 1, 16, 17 SSA SSD(HW) Rev. 01 — ...

  • Page 4

    ... NXP Semiconductors 7. Pinning information 7.1 Pinning Fig 2. 7.2 Pin description Table 3. Symbol V SSD(HW) IN1P IN1N DIAG ENGAGE POWERUP CGND V DDA V SSA OSCREF HVPREF INREF TEST IN2N IN2P V SSD(HW) V SSD(HW) DREF TDA8933B_1 Preliminary data sheet 1 V SSD(HW) IN1P 2 IN1N 3 4 DIAG ENGAGE ...

  • Page 5

    ... NXP Semiconductors Table 3. Symbol HVP2 V DDP2 BOOT2 OUT2 V SSP2 STAB2 STAB1 V SSP1 OUT1 BOOT1 V DDP1 HVP1 OSCIO V SSD(HW) Exposed die [1] pad [1] The exposed die pad has to be connected Functional description 8.1 General The TDA8933B is a mono full-bridge or stereo half-bridge audio power amplifier using class D technology ...

  • Page 6

    ... NXP Semiconductors 8.2 Mode selection and interfacing The TDA8933B can be switched to one of four operating modes using pins POWERUP and ENGAGE: • Sleep mode: with low supply current. • Mute mode: the amplifiers are switching to idle (50 % duty cycle), but the audio signal ...

  • Page 7

    ... NXP Semiconductors V P POWERUP DREF OSCIO HVPREF HVP1, HVP2 2.0 V (typical) 1.2 V (typical) ENGAGE OUT1, OUT2 PWM DIAG Fig 3. Start-up sequence 8.3 Pulse Width Modulation (PWM) frequency The output signal of the amplifi PWM signal with a carrier frequency of approximately 320 kHz. Using a 2 analog audio signal across the loudspeaker ...

  • Page 8

    ... NXP Semiconductors R = oscillator resistor ( ) (on pin OSCREF) osc Fig 4. Table 5 For device synchronization see Table 5. Configuration Master Slave 8.4 Protections The following protections are implemented in the TDA8933B: • Thermal Foldback (TF) • OverTemperature Protection (OTP) • OverCurrent Protection (OCP) • Window Protection (WP) • ...

  • Page 9

    ... NXP Semiconductors This means that the device will not switch off completely, but remains operational at lower output power levels. With music output signals, this feature enables high peak output powers while still operating without any external heat sink other than the copper area on the Printed-Circuit Board (PCB) ...

  • Page 10

    ... NXP Semiconductors If the supply voltage exceeds 36 V the OVP circuit is activated and the power stages will shut down enabled again as soon as the supply voltage drops below the threshold level. The power stage is restarted after 100 ms. Supply voltages > may damage the TDA8933B. Two conditions should be distinguished here: • ...

  • Page 11

    ... NXP Semiconductors 8.5 Diagnostic input and output Except for TF, whenever one of the protections is triggered pin DIAG is activated to LOW level (see approximately 2.5 V. This current source can deliver approximately 50 A. The DIAG pin refers to pin CGND. The diagnostic output signal during different short circuit conditions is illustrated in Fault mode ...

  • Page 12

    ... NXP Semiconductors 8.7 Output voltage buffers When pin POWERUP is set HIGH the half-supply output voltage buffers are switched on in asymmetrical configuration. The start-up will then be pop-free because the device starts switching when the capacitor on pin HVPREF and the SE capacitors are completely charged ...

  • Page 13

    ... NXP Semiconductors Table 7. Pin TDA8933B_1 Preliminary data sheet Internal circuitry Symbol Equivalent circuit DIAG 4 ENGAGE 5 POWERUP CGND Rev. 01 — 23 October 2008 TDA8933B Class D audio amplifier V 2.5 V DDA 50 A 500 20 % 100 CGND SSA 001aaf607 V 2.8 V DDA I ref = 100 CGND SSA 001aaf608 ...

  • Page 14

    ... NXP Semiconductors Table 7. Pin TDA8933B_1 Preliminary data sheet Internal circuitry Symbol Equivalent circuit V DDA V SSA OSCREF HVPREF TEST Rev. 01 — 23 October 2008 TDA8933B Class D audio amplifi SSA V SSD 001aad790 V DDA 9 V SSD 001aad791 V DDA I ref 10 V 001aad792 SSA V DDA 11 V SSA ...

  • Page 15

    ... NXP Semiconductors Table 7. Pin TDA8933B_1 Preliminary data sheet Internal circuitry Symbol Equivalent circuit DREF HVP2 HVP1 V DDP2 V SSP2 V SSP1 V DDP1 BOOT2 BOOT1 OUT2 OUT1 Rev. 01 — 23 October 2008 TDA8933B Class D audio amplifi SSD 001aag025 V DDA 19 001aag026 SSA 20, 29 23, 26 001aad798 ...

  • Page 16

    ... NXP Semiconductors Table 7. Pin 10. Limiting values Table 8. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol ORM stg T amb P V esd [ [2] Measured with respect to pin INREF; V [3] Measured with respect to pin V [4] Measured with respect to pin CGND [6] Current limiting concept. ...

  • Page 17

    ... NXP Semiconductors [8] Machine Model (MM); R 11. Thermal characteristics Table 9. Thermal characteristics Symbol Parameter R thermal resistance from th(j-a) junction to ambient thermal characterization j-lead parameter from junction to lead thermal characterization j-top parameter from junction to top of package R thermal resistance from th(j-c) junction to case [1] Measured on a JEDEC high K-factor test board (standard EIA/JESO 51-7) in free air with natural convection. ...

  • Page 18

    ... NXP Semiconductors Table 10. Characteristics …continued 320 kHz and T P osc amb Symbol Parameter [1] Engage input: pin ENGAGE V output voltage O V input voltage I I output current O V LOW-level input IL voltage V HIGH-level input IH voltage [1] Diagnostic output: pin DIAG V output voltage O Bias voltage for inputs: pin INREF ...

  • Page 19

    ... NXP Semiconductors Table 10. Characteristics …continued 320 kHz and T P osc amb Symbol Parameter V low unbalance P(th)(ubp)l protection threshold supply voltage V high unbalance P(th)(ubp)h protection threshold supply voltage Current protections I overcurrent protection O(ocp) output current Temperature protection T thermal protection act(th_prot) ...

  • Page 20

    ... NXP Semiconductors Table 12. SE characteristics kHz Symbol Parameter P RMS output power o(RMS) THD+N total harmonic distortion-plus-noise G closed-loop voltage gain v(cl voltage gain difference V channel separation cs SVRR supply voltage ripple rejection |Z | input impedance i V output noise voltage n(o) V mute output voltage O(mute) ...

  • Page 21

    ... NXP Semiconductors Table 13. BTL characteristics kHz Symbol Parameter P RMS output power o(RMS) THD+N total harmonic distortion-plus-noise G closed-loop voltage gain v(cl input impedance i V output noise voltage n(o) V mute output voltage O(mute) CMRR common mode rejection ratio output power efficiency po [ the total series resistance of an inductor and a ESR single ended capacitor in the application. ...

  • Page 22

    ... NXP Semiconductors SE configuration 0.5% BTL configuration 0.5% Where: • • • R DSon • • R ESR • t w(min) • f osc The output power 10% Figure 7 THD function of the supply voltage for SE and BTL configurations at different load impedances. The output power is calculated with: R ...

  • Page 23

    ... NXP Semiconductors (W/channel ( THD+N = 0 When the maximum current reached, the current limitation feature becomes active. See also details. Fig 7. SE output power as a function of supply voltage (2) ( THD+N = 0 When the maximum current reached, the current limitation feature becomes active. See also details ...

  • Page 24

    ... NXP Semiconductors 14.2 Output current limitation The peak output current I normal operation the output current should not exceed this threshold level, otherwise the signal will be distorted. The peak output current BTL configurations can be calculated using SE configuration max BTL configuration: ...

  • Page 25

    ... NXP Semiconductors 14.4 Single-ended capacitor The SE capacitor forms a high-pass filter with the speaker impedance. This means that the frequency response will roll off with 20 dB per decade below f frequency of 3 dB. The 3 dB cut-off frequency is equal to – 3dB Where: • f 3dB • ...

  • Page 26

    ... NXP Semiconductors • series resistors ( • series resistors ( ----------------- - EQ R3 Where: • • parallel resistor ( • internal input impedance ( i Example: Substituting 4 results in a gain of G 14.6 Device synchronization If two or more TDA8933B devices are used in one application it is recommended that all the devices are synchronized at the same switching frequency to avoid beat tones. This can be done by connecting all OSCIO pins together and confi ...

  • Page 27

    ... NXP Semiconductors 14.7 Thermal behavior (PCB considerations) The TDA8933B is available in a thermally enhanced HTSSOP32 (SOT549-1) package for reflow soldering. The HTSSOP32 package has an exposed die pad that reduces significantly the overall Rth(j-a). Therefore it is required to solder the exposed die pad (at VSSD level copper plane for cooling. A low thermal-resistance can be achieved when using a multilayer PCB with suffi ...

  • Page 28

    ... NXP Semiconductors The pumping effect should not cause a malfunction of either the audio amplifier or the power supply, which can also be caused by triggering of the undervoltage or overvoltage protection of the amplifier. Pumping effects configuration can be minimized by connecting audio inputs in anti-phase and changing the polarity of one speaker as shown in Fig 11 ...

  • Page 29

    ... NXP Semiconductors 2 10 THD+N (%) ( Fig 13. Total harmonic distortion-plus-noise as a function of frequency 40 G v(cl) (dB) 30 (2) ( 100 mV (RMS ( ( Fig 14. Gain as a function of frequency TDA8933B_1 Preliminary data sheet 010aaa505 THD+N (%) (Hz 010aaa507 SVRR (dB (Hz 1000 F se Fig 15. Supply voltage ripple rejection as a function of Rev. 01 — 23 October 2008 TDA8933B Class D audio amplifi ...

  • Page 30

    ... NXP Semiconductors 100 S/N (dB) ( kHz brick wall filter AES17 Fig 16. Signal-to-noise ratio as a function of output power 100 po (%) ( kHz; = ------------------------ - ( ( Fig 18. Output power efficiency as a function of output power TDA8933B_1 Preliminary data sheet 010aaa509 (dB (W) o Fig 17. Channel separation as a function of frequency 010aaa511 ...

  • Page 31

    ... NXP Semiconductors (W/channel) 20 ( kHz; Short time ( THD = ( THD = 0 ( THD = ( THD = 0 Fig 20. Maximum output power per channel as a function of supply voltage ( Sleep 0 0 0.5 1 1.5 V > kHz; V ENGAGE i Fig 22. Output voltage as a function of voltage on pin POWERUP TDA8933B_1 Preliminary data sheet 010aaa513 ...

  • Page 32

    ... NXP Semiconductors 14.10 BTL curves measured in the reference design 2 10 THD+N (%) ( BTL kHz i ( kHz i ( kHz i Fig 24. Total harmonic distortion-plus-noise as a function of output power 2 10 THD+N (%) ( ( BTL Fig 25. Total harmonic distortion-plus-noise as a function of frequency TDA8933B_1 Preliminary data sheet 010aaa517 2 10 ...

  • Page 33

    ... NXP Semiconductors 100 po (%) kHz i (1) 8 BTL (2) 16 BTL Fig 26. Output power efficiency as a function of output power kHz; Power dissipation in junction only i (1) 8 BTL (2) 16 BTL Fig 28. Power dissipation as a function of output power TDA8933B_1 Preliminary data sheet 010aaa521 (2) (1) Gv(cl) (dB) ...

  • Page 34

    ... NXP Semiconductors ( ( kHz i (1) 16 BTL at THD (2) 16 BTL at THD+N = 0.5 % (3) 8 BTL at THD (4) 8 BTL at THD+N = 0.5 % Fig 30. Output power as a function of supply voltage TDA8933B_1 Preliminary data sheet 010aaa525 0 SVRR (1) (dB 100 (V) P (1) V (2) V Fig 31. Supply voltage ripple rejection as a function of Rev. 01 — ...

  • Page 35

    ... NXP Semiconductors 14.11 Typical application schematics (simplified) R vdda GND C in 470 nF MUTE control C en 470 nF SLEEP control C osc 100 nF R osc hvpref 470 nF Fig 32. Typical simplified application diagram for 2 TDA8933B_1 Preliminary data sheet vdda C vddp 100 nF 220 F (35 V) ...

  • Page 36

    ... NXP Semiconductors R vdda GND MUTE C en control 470 nF SLEEP control C osc 100 nF R osc hvp 100 nF Fig 33. Typical simplified application diagram for 1 TDA8933B_1 Preliminary data sheet vdda C vddp 100 nF 220 F ( SSD(HW) SSD(HW IN1P OSCIO 2 31 IN1N HVP1 DIAG DDP1 4 29 ...

  • Page 37

    ... NXP Semiconductors R vdda GND R vssa 470 nF MUTE control C en 470 nF SLEEP control C osc 100 nF R osc V SSA inref 100 470 nF Fig 34. Typical simplified application diagram for 2 TDA8933B_1 Preliminary data sheet DDA C vddp C vdda 220 F 100 nF ( vssp C vssa 220 F 100 nF (25 V) ...

  • Page 38

    ... NXP Semiconductors R vdda GND R vssa MUTE control SLEEP control C osc 100 nF R osc VSSA 39 k 100 nF Fig 35. Typical simplified application diagram for 1 TDA8933B_1 Preliminary data sheet DDA C vddp C vdda 220 F 100 nF ( vssp C vssa 220 F 100 nF ( SSA SSD(HW SSA IN1P 2 IN1N ...

  • Page 39

    ... NXP Semiconductors 15. Package outline HTSSOP32: plastic thermal enhanced thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm; exposed die pad y exposed die pad side pin 1 index 1 e DIMENSIONS (mm are the original dimensions). A UNIT max. 0.15 0.95 mm 1.1 0.25 ...

  • Page 40

    ... NXP Semiconductors 16. Revision history Table 16. Revision history Document ID Release date TDA8933B_1 20081023 TDA8933B_1 Preliminary data sheet Data sheet status Change notice Preliminary data sheet - Rev. 01 — 23 October 2008 TDA8933B Class D audio amplifier Supersedes - © NXP B.V. 2008. All rights reserved. ...

  • Page 41

    ... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

  • Page 42

    ... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 5 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 Functional description . . . . . . . . . . . . . . . . . . . 5 8.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8.2 Mode selection and interfacing . . . . . . . . . . . . . 6 8.3 Pulse Width Modulation (PWM) frequency . . . . 7 8 ...