TDA8933BTW/N2,118 NXP Semiconductors, TDA8933BTW/N2,118 Datasheet
TDA8933BTW/N2,118
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TDA8933BTW/N2,118 Summary of contents
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UBA2074(A) High Voltage Full-bridge control IC for CCFL backlighting Rev. 02.0 — February 2007 1. General description The UBA2074 is a high voltage IC intended to drive Cold Cathode Fluorescent Lamps (CCFLs) for back-lighting applications. The IC contains level-shifters, bootstrap ...
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... NXP Semiconductors 3. Applications LCD-backlighting, including LCD-TV and LCD-Monitor applications. The IC is intended to drive and control a full-bridge inverter with resonant load circuit for CCFLs, but can also drive an array of External Electrode Fluorescent Lamps (EEFLs). 4. Ordering information Table 1: Ordering information Type number UBA2074T ...
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... NXP Semiconductors 5. Block diagram Fig 1. Block diagram UBA2074(A) (Shaded circuit not present in the UBA2074A). UBA2074(A) Preliminary data sheet High Voltage Full-bridge control IC for CCFL backlighting Rev. 02.0 — February 2007 UBA2074(A) © NXP B.V. 2007. All rights reserved ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. Pin assignment SO28 and SSOP28 package (top view) 6.2 Pin description Table 2: Pin description Symbol Pin Description IFB 1 current feedback input. CIFB 2 current regulation capacitor. VFB 3 voltage feedback input CVFB 4 voltage regulation capacitor IREF 5 reference current output A 33kΩ ...
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... NXP Semiconductors Table 2: Pin description …continued Symbol Pin Description CSWP 9 phase-shift sweep capacitor CPWM 10 PWM timing capacitor SYNC 11 synchronization input/output nonFAULT 12 status signal input/output PWMa 13 analog PWM dimming input PMWd 14 digital PWM dimming input/output GHB 15 high-side driver output B Gate connection of the high side power switch of full bridge halve B ...
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... NXP Semiconductors 7. Functional description The UBA2074 is designed to drive a full-bridge inverter with resonant load. The load consists typically of transformers with CCFLs. Two parameters are used by the UBA2074 to control the switches of the full-bridge inverter: the phase shift and the switching frequency. The two full bridge halves A and B frequency. The frequency is used to control transformer output voltage during the fi ...
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... NXP Semiconductors 7.1 IC Supply The IC can be supplied in two ways, as illustrated in at which the IC starts up and stops, non-overlap time and minimum phase shift during PWM dimming depend on the this supply configuration. Fig 5. IC supply configurations In the low voltage configuration the VDC pin is connected to an external supply with a voltage ...
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... NXP Semiconductors 7.3 Start-up and Under-Voltage Lock-Out (UVLO) The start and stop voltage levels on the VDC-pin depent on the way the IC is supplied: In the low voltage configuration, the IC starts oscillating) when the voltage on the VDC-pin drops below V In the high voltage configuration, the IC starts oscillating) when the voltage on the VDC-pin drops below V 7 ...
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... NXP Semiconductors Advantage of the sweep rather then a fixed ignition frequency is that sensitivity for spread in resonance frequency is much lower. Once the lamps are ignited the frequency sweep down continues, gradually increasing the lamp current (the resonance circuit should now still be inductive, so current increases as ...
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... NXP Semiconductors Fig 8. frequency and phase shift as function of CVFB and CSWP voltages 7.6 Lamp current control The lamp current control is active during the initial ignition frequency sweep and when the lamps are on disabled during the time within a PWM dim cycle that the lamps are off. ...
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... NXP Semiconductors 7.7 PWM dimming During the time within a PWM dim cycle that the lamps are off, switches S1 and S2 are opened (non-conducting). In this way the regulation level is stored in C1 when the current regulation loop is opened (see After the regulation loop is opened discharged (the voltage on the CSWP-pin is swept down) to switch off the lamps, and charged again to turn the lamps on again ...
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... NXP Semiconductors The signal on the PWMd-pin is active low. A voltage below V the lamps on and a voltage above V Fig 11. PWM dimming configurations PWM dimming of multiple ICs can be synchronised by configuring one IC as master and the others as slaves and connecting all PWMd-pins together. PWM dimming is only enabled in normal mode, when no fault condition excists. The only ...
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... NXP Semiconductors Fig 12. HF synchronization of multiple inverters with an external SYNC-signal The second way consists of interconnecting all inverters through the SYNC-pin, see Figure 13. In this case all inverters will lock to the highest of the minimum switching frequencies of all ICs in a PLL-type of way. Fig 13. HF synchronization of multiple inverters without an external SYNC-signal Fig 14 ...
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... NXP Semiconductors Both synchronisation methods will also lock all inverters in phase. All the full bridge voltages will all be exactly in phase, even if the (regulated) phase difference between outputs A and B of each IC is not the same. In this way, all lamps in a multi inverter system are running at the same frequency and with equal lamp current phase, as illustrated in Synchronisation is only enabled in normal mode, when no fault condition excists ...
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... NXP Semiconductors Fig 16. Fault timer wavefporms 7.10 Protections All fault conditions and how they are processed in the IC can be found in hardswitching is not present in the A-version. The UBA2074 includes internal over voltage (OV), overcurrent (OC), bad contact or arcing (ARC), ignition failure (IF) and hard switching (HS) nonFAULT-pin) which provides bidirectional fault signalling to and from any external circuit ...
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... NXP Semiconductors 7.10.1 Over voltage protection The over voltage protection circuit is intended to prevent the transformer output voltage from exceeding its maximum rating. It can also be used to regulate the output voltage to the required lamp ignition voltage. When the voltage on the VFB-pin exceeds the OV reference level V is detected ...
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... NXP Semiconductors The UBA2074 is capable of driving a full bridge at a higher voltage then its own supply voltage. A special feature is included to accomodate applications where zero voltage switching becomes important. The design of the resonant load determines if zero voltage switching occurs during normal operation. To prevent overheating of the external power switches of the full bridge due to high switching losses in case of any abnormal condition, the hard-switching of both half-bridge voltages is monitored internally ...
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... NXP Semiconductors Fig 18. Input and output levels at the nonFAULT pin. The signal from the voltage signal and the signal to the current signal. In this way a driving conflict is prevented. Also it leaves the possibility for the outside world to see the signal from the IC even while a fault condition is being signalled to the IC in the mean time, as illustrated in Fig 19 ...
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... NXP Semiconductors 7.12 Non overlap For each half bridge a delay is made between the switching-off of the external high side power transistor and the switching-on of the external low side power transistor and the other way round. The duration of this so called ‘non-overlap’ time (T selected via the supply confi ...
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... NXP Semiconductors Table 3: Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are measured with respect to signal ground (pin 7); positive currents flow into the chip. The voltage ratings are valid provided other ratings are not violated. ...
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... NXP Semiconductors Table 5: Characteristics …continued = 25 ° VDD not connected to VDC; V amb VDC to a capacitor, unless otherwise specified. All voltages are measured with respect to signal ground (pin 7); currents are positive when flowing into the IC. Symbol Parameter I total supply current on pin VDC oscillating ...
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... NXP Semiconductors Table 5: Characteristics …continued = 25 ° VDD not connected to VDC; V amb VDC to a capacitor, unless otherwise specified. All voltages are measured with respect to signal ground (pin 7); currents are positive when flowing into the IC. Symbol Parameter V CSWP voltage resulting in CSWP(high) ∆φ ...
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... NXP Semiconductors Table 5: Characteristics …continued = 25 ° VDD not connected to VDC; V amb VDC to a capacitor, unless otherwise specified. All voltages are measured with respect to signal ground (pin 7); currents are positive when flowing into the IC. Symbol Parameter I maximum low output current on nonFAULT(sink) ...
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... NXP Semiconductors Fig 20. Example backlighting application diagram UBA2074(A) Preliminary data sheet High Voltage Full-bridge control IC for CCFL backlighting Rev. 02.0 — February 2007 UBA2074(A) © NXP B.V. 2007. All rights reserved ...
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... NXP Semiconductors 12. Test information 12.1 Quality information The General Quality Specification for Integrated Circuits, SNW-FQ-611 is applicable. UBA2074(A) Preliminary data sheet High Voltage Full-bridge control IC for CCFL backlighting Rev. 02.0 — February 2007 UBA2074(A) © NXP B.V. 2007. All rights reserved. ...
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... NXP Semiconductors 13. Package outline Fig 21. Package outline SO28 (SOT136-1) UBA2074(A) Preliminary data sheet High Voltage Full-bridge control IC for CCFL backlighting Rev. 02.0 — February 2007 UBA2074(A) © NXP B.V. 2007. All rights reserved ...
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... NXP Semiconductors Fig 22. Package outline SSOP28 (SOT341-1) UBA2074(A) Preliminary data sheet High Voltage Full-bridge control IC for CCFL backlighting Rev. 02.0 — February 2007 UBA2074(A) © NXP B.V. 2007. All rights reserved ...
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... NXP Semiconductors 14. Soldering 14.1 Introduction This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board ...
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... NXP Semiconductors – for packages with a thickness ≥ 2.5 mm – for packages with a thickness < 2.5 mm and a volume ≥ 350 mm thick/large packages. below 240 °C (SnPb process) or below 260 °C (Pb-free process) for packages with a • thickness < 2.5 mm and a volume < 350 mm Moisture sensitivity precautions, as indicated on packing, must be respected at all times. ...
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... NXP Semiconductors 14.4 Package related soldering information Table 6. Suitability of IC packages for wave, reflow and dipping soldering methods Mounting Through-hole mount Through-hole- surface mount Surface mount [1] For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your Philips Semiconductors sales office. ...
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... NXP Semiconductors 15. Revision history Table 7: Revision history Document ID Release date UBA2072_1 January 2007 UBA2072_2 February 2007 Preliminary data UBA2074(A) Preliminary data sheet High Voltage Full-bridge control IC for CCFL backlighting Data sheet status Change notice Preliminary data - - - - - - - Rev. 02.0 — February 2007 ...
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... NXP Semiconductors 15.1 Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www ...
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... NXP Semiconductors 17. Contents UBA2074(A) Preliminary data sheet High Voltage Full-bridge control IC for CCFL backlighting Rev. 02.0 — February 2007 UBA2074(A) © NXP B.V. 2007. All rights reserved ...