TDA8932BTW/N2,118 NXP Semiconductors, TDA8932BTW/N2,118 Datasheet - Page 29

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TDA8932BTW/N2,118

Manufacturer Part Number
TDA8932BTW/N2,118
Description
IC AMP AUDIO CLASS D 32HTSSOP
Manufacturer
NXP Semiconductors
Type
Class Dr
Datasheets

Specifications of TDA8932BTW/N2,118

Output Type
1-Channel (Mono) or 2-Channel (Stereo)
Package / Case
32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
Max Output Power X Channels @ Load
55W x 1 @ 8 Ohm; 26.5W x 2 @ 4 Ohm
Voltage - Supply
10 V ~ 36 V, ±5 V ~ 18 V
Features
Depop, Differential Inputs, Mute, Short-Circuit and Thermal Protection
Mounting Type
Surface Mount
Product
Class-D
Output Power
55 W
Available Set Gain
36 dB
Common Mode Rejection Ratio (min)
75 dB
Thd Plus Noise
0.007 %
Operating Supply Voltage
22 V
Supply Current
0.145 mA
Maximum Power Dissipation
5000 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Audio Load Resistance
8 Ohms
Dual Supply Voltage
+/- 11 V
Input Signal Type
Differential
Minimum Operating Temperature
- 40 C
Output Signal Type
Differential, Single
Supply Type
Single or Dual
Supply Voltage (max)
36 V
Supply Voltage (min)
10 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935283479118
NXP Semiconductors
9. Static characteristics
Table 10.
T
positive currents flow in the IC; typical values are given at V
UJA1079_2
Product data sheet
Symbol
Supply; pin BAT
V
I
I
V
V
BAT
BAT(add)
vj
BAT
th(det)pon
th(det)poff
=
40 °C to +150
Static characteristics
Parameter
battery supply voltage
battery supply current
additional battery supply
current
power-on detection threshold
voltage
power-off detection threshold
voltage
°
C; V
BAT
= 4.5 V to 28 V; V
All information provided in this document is subject to legal disclaimers.
Conditions
MC = 00 (Standby; V1 on)
STBCL = 1 (LIN wake-up enabled)
WIC1 = WIC2 = 11 (WAKE interrupts
enabled); 7.5 V < V
I
V
MC = 01 (Sleep; V1 off)
STBCL = 1 (LIN wake-up enabled)
WIC1 = WIC2 = 11 (WAKE interrupts
enabled); 7.5 V < V
V
contributed by LIN wake-up receiver
STBCL = 1
V
contributed by WAKE pin edge
detectors; WIC1 = WIC2 = 11
V
5.1 V < V
4.5 V < V
V1 on (5 V version)
LIN Active mode (recessive)
STBCL = 0; MC = 1x
V
5.5 V < V
LIN Active mode (dominant)
STBCL = 0; MC = 1x
V
V
LIN Active mode (dominant)
STBCL = 0; MC = 1x
V
V
BAT
V1
TXDL
V1
LIN
WAKE1
TXDL
TXDL
BAT
TXDL
BAT
T
T
T
T
T
T
= 0 mA; V
vj
vj
vj
vj
vj
vj
= 0 V
> V
Rev. 02 — 27 May 2010
= V
= −40 °C
= 25 °C
= 150 °C
= −40 °C
= 25 °C
= 150 °C
= 14 V
= 28 V
= V
= 0 V; I
= V
= 0 V; I
V1
= V
BAT
V1
BAT
BAT
BAT
; R
V1
; 5.5 V < V
; I
WAKE2
; V
BAT
LIN
DLIN
< 7.5 V
< 5.1 V
< 28 V
DLIN
RSTN
DLIN
SDI
= 500
= 14 V; unless otherwise specified.
= I
= I
= V
= I
= V
= V
BAT
BAT
LIN
LIN
LIN
BAT
SCK
SCSN
BAT
Ω
< 28 V
< 28 V
= 0 mA
= 0 mA
; all voltages are defined with respect to ground;
= 0 mA
= 0 V
< 28 V
= V
V1
Min
4.5
-
-
-
-
-
-
-
0
-
-
-
-
-
4.5
4.25
LIN core system basis chip
Typ
-
75
68
62
53
49
45
1.1
5
-
-
-
-
-
-
-
UJA1079
© NXP B.V. 2010. All rights reserved.
5.5
4.5
Max
28
89
80
73
62
57
51
2
10
50
3
1300
5
10
29 of 45
Unit
V
μA
μA
μA
μA
μA
μA
μA
μA
μA
mA
μA
mA
mA
V
V

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