TDA8932BTW/N2,118 NXP Semiconductors, TDA8932BTW/N2,118 Datasheet - Page 38

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TDA8932BTW/N2,118

Manufacturer Part Number
TDA8932BTW/N2,118
Description
IC AMP AUDIO CLASS D 32HTSSOP
Manufacturer
NXP Semiconductors
Type
Class Dr
Datasheets

Specifications of TDA8932BTW/N2,118

Output Type
1-Channel (Mono) or 2-Channel (Stereo)
Package / Case
32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
Max Output Power X Channels @ Load
55W x 1 @ 8 Ohm; 26.5W x 2 @ 4 Ohm
Voltage - Supply
10 V ~ 36 V, ±5 V ~ 18 V
Features
Depop, Differential Inputs, Mute, Short-Circuit and Thermal Protection
Mounting Type
Surface Mount
Product
Class-D
Output Power
55 W
Available Set Gain
36 dB
Common Mode Rejection Ratio (min)
75 dB
Thd Plus Noise
0.007 %
Operating Supply Voltage
22 V
Supply Current
0.145 mA
Maximum Power Dissipation
5000 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Audio Load Resistance
8 Ohms
Dual Supply Voltage
+/- 11 V
Input Signal Type
Differential
Minimum Operating Temperature
- 40 C
Output Signal Type
Differential, Single
Supply Type
Single or Dual
Supply Voltage (max)
36 V
Supply Voltage (min)
10 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935283479118
NXP Semiconductors
12. Package outline
Fig 16. Package outline SOT549-1 (HTSSOP32)
UJA1079_2
Product data sheet
HTSSOP32: plastic thermal enhanced thin shrink small outline package; 32 leads;
body width 6.1 mm; lead pitch 0.65 mm; exposed die pad
DIMENSIONS (mm are the original dimensions).
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
E h
VERSION
OUTLINE
SOT549-1
max.
32
1.1
1
A
Z
y
pin 1 index
0.15
0.05
A 1
0.95
0.85
A 2
IEC
0.25
A 3
exposed die pad side
e
0.30
0.19
b p
D h
D
0.20
0.09
c
All information provided in this document is subject to legal disclaimers.
MO-153
JEDEC
11.1
10.9
D
(1)
REFERENCES
0
Rev. 02 — 27 May 2010
D h
5.1
4.9
E
6.2
6.0
b
(2)
p
JEITA
scale
17
16
2.5
E h
3.6
3.4
w
c
M
0.65
e
A 2
5 mm
A 1
H E
8.3
7.9
L
1
0.75
0.50
L p
H E
E
PROJECTION
detail X
EUROPEAN
LIN core system basis chip
0.2
v
L
L
p
0.1
w
UJA1079
© NXP B.V. 2010. All rights reserved.
(A 3 )
0.1
y
A
ISSUE DATE
03-04-07
05-11-02
0.78
0.48
θ
X
Z
SOT549-1
A
v
M
8
0
θ
o
o
38 of 45
A

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