TDA8932BTW/N2,118 NXP Semiconductors, TDA8932BTW/N2,118 Datasheet - Page 8

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TDA8932BTW/N2,118

Manufacturer Part Number
TDA8932BTW/N2,118
Description
IC AMP AUDIO CLASS D 32HTSSOP
Manufacturer
NXP Semiconductors
Type
Class Dr
Datasheets

Specifications of TDA8932BTW/N2,118

Output Type
1-Channel (Mono) or 2-Channel (Stereo)
Package / Case
32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
Max Output Power X Channels @ Load
55W x 1 @ 8 Ohm; 26.5W x 2 @ 4 Ohm
Voltage - Supply
10 V ~ 36 V, ±5 V ~ 18 V
Features
Depop, Differential Inputs, Mute, Short-Circuit and Thermal Protection
Mounting Type
Surface Mount
Product
Class-D
Output Power
55 W
Available Set Gain
36 dB
Common Mode Rejection Ratio (min)
75 dB
Thd Plus Noise
0.007 %
Operating Supply Voltage
22 V
Supply Current
0.145 mA
Maximum Power Dissipation
5000 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Audio Load Resistance
8 Ohms
Dual Supply Voltage
+/- 11 V
Input Signal Type
Differential
Minimum Operating Temperature
- 40 C
Output Signal Type
Differential, Single
Supply Type
Single or Dual
Supply Voltage (max)
36 V
Supply Voltage (min)
10 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935283479118
NXP Semiconductors
UJA1079_2
Product data sheet
Fig 3.
power-on threshold V
power-off threshold V
UJA1079 system controller
(from all modes)
V
BAT
V
successful
watchdog
BAT
trigger
below
below
th(det)pon
th(det)poff
LIN: Active/Lowpower
watchdog: Window/
high resistance
watchdog: OFF
Timeout/Off
LIN: Off and
INTN: HIGH
MC = 1x
Normal
V1: OFF
V1: ON
reset event or
Off
MC = 00
All information provided in this document is subject to legal disclaimers.
watchdog overflow or
V1 undervoltage
Rev. 02 — 27 May 2010
power-on threshold V
limp home = LOW (active)
MC = 10 or MC = 11
watchdog: OFF
high resistance
V
one wake-up enabled and
Overtemp
LIN: Off and
BAT
V1: OFF
no wake-up pending
INTN = HIGH and
watchdog: Timeout/Off
above
MC = 01 and
LIN: Lowpower/Off
Standby
th(det)pon
MC = 00
V1: ON
OTP release threshold T
wake-up event if enabled
chip temperature below
OTP activatrion threshold T
watchdog
trigger
chip temperature above
LIN core system basis chip
th(rel)otp
one wake-up enabled and
from Standby or Normal
no wake-up pending
LIN: Lowpower/Off
INTN = HIGH and
watchdog: OFF
RSTN: LOW
MC = 01 and
UJA1079
V1: OFF
MC = 01
© NXP B.V. 2010. All rights reserved.
Sleep
th(act)otp
015aaa125
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