74HC165D Philips Semiconductors, 74HC165D Datasheet

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74HC165D

Manufacturer Part Number
74HC165D
Description
8-bit parallel-in/serial-out shift register
Manufacturer
Philips Semiconductors
Datasheet

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Product specification
File under Integrated Circuits, IC06
DATA SHEET
74HC/HCT165
8-bit parallel-in/serial-out shift
register
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
INTEGRATED CIRCUITS
December 1990

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74HC165D Summary of contents

Page 1

DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT165 8-bit parallel-in/serial-out shift register Product specification File under Integrated Circuits, IC06 ...

Page 2

... Philips Semiconductors 8-bit parallel-in/serial-out shift register FEATURES Asynchronous 8-bit parallel load Synchronous serial input Output capability: standard I category: MSI CC GENERAL DESCRIPTION The 74HC/HCT165 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no ...

Page 3

... Philips Semiconductors 8-bit parallel-in/serial-out shift register PIN DESCRIPTION PIN NO. SYMBOL GND 11, 12, 13, 14 Fig.1 Pin configuration. December 1990 NAME AND FUNCTION asynchronous parallel load input (active LOW) complementary output from the last stage serial output from the last stage clock input (LOW-to-HIGH edge-triggered) ...

Page 4

... Philips Semiconductors 8-bit parallel-in/serial-out shift register FUNCTION TABLE OPERATING MODES PL parallel load serial shift H hold “do nothing” H Note HIGH voltage level h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition L = LOW voltage level I = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition ...

Page 5

... Philips Semiconductors 8-bit parallel-in/serial-out shift register DC CHARACTERISTICS FOR 74HC For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” Output capability: standard I category: MSI CC AC CHARACTERISTICS FOR HC GND = ns SYMBOL PARAMETER propagation delay PHL PLH CE propagation delay PHL PLH propagation delay PHL PLH ...

Page 6

... Philips Semiconductors 8-bit parallel-in/serial-out shift register SYMBOL PARAMETER t hold time CP hold time maximum clock max pulse frequency December 1990 amb 74HC min. typ. max. min. max Product specification 74HC/HCT165 TEST CONDITIONS UNIT WAVEFORMS 125 (V) min. max 2.0 Fig.6 5 4.5 5 6.0 ...

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... Philips Semiconductors 8-bit parallel-in/serial-out shift register DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” Output capability: standard I category: MSI CC Note to HCT types The value of additional quiescent supply current ( I To determine I per input, multiply this value by the unit load coefficient shown in the table below. ...

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... Philips Semiconductors 8-bit parallel-in/serial-out shift register AC CHARACTERISTICS FOR 74HCT GND = ns SYMBOL PARAMETER propagation delay PHL PLH CE propagation delay PHL PLH propagation delay PHL PLH output transition time THL TLH t clock pulse width W HIGH or LOW t parallel load pulse W width; LOW t removal time ...

Page 9

... Philips Semiconductors 8-bit parallel-in/serial-out shift register AC WAVEFORMS The changing to output assumes internal Q opposite state from ( 50 GND HCT 1 GND Fig.6 Waveforms showing the clock (CP) to output (Q output transition times and the maximum clock frequency. The changing to output assumes internal Q opposite state from Q ...

Page 10

... Philips Semiconductors 8-bit parallel-in/serial-out shift register CE may change only from HIGH-to-LOW while CP is LOW. The shaded areas indicate when the input is permitted to change for predictable output performance GND HCT 1 GND Fig.9 Waveforms showing the set-up and hold times from the serial data input (D enable (CE) inputs, from the clock enable input (CE) to the clock input (CP) and from the clock input (CP) to the clock enable input (CE) ...

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