CY7C1021-15VC Cypress Semiconductor Corporation., CY7C1021-15VC Datasheet

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CY7C1021-15VC

Manufacturer Part Number
CY7C1021-15VC
Description
64K x 16 Static RAM
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Part Number
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Quantity
Price
Part Number:
CY7C1021-15VC
Manufacturer:
CYP
Quantity:
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Part Number:
CY7C1021-15VC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
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Cypress Semiconductor Corporation
Document #: 38-05054 Rev. **
Features
Functional Description
The CY7C1021 is a high-performance CMOS static RAM or-
ganized as 65,536 words by 16 bits. This device has an auto-
matic power-down feature that significantly reduces power
consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
Selection Guide
Logic Block Diagram
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum CMOS Standby Current (mA)
Shaded areas contain preliminary information.
• High speed
• CMOS for optimum speed/power
• Low active power
• Automatic power-down when deselected
• Independent Control of Upper and Lower bits
• Available in 44-pin TSOP II and 400-mil SOJ
A
A
A
A
A
A
A
A
— t
— 1320 mW (max.)
1
0
7
6
5
4
3
2
AA
= 12 ns
DATA IN DRIVERS
COLUMN DECODER
RAM Array
512 X 2048
64K x 16
Commercial
Commercial
L
3901 North First Street
(BLE) is LOW, then data from I/O pins (I/O
written into the location specified on the address pins (A
through A
from I/O pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip En-
able (CE) and Output Enable (OE) LOW while forcing the write
enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then
data from the memory location specified by the address pins
will appear on I/O
then data from memory will appear on I/O
truth table at the back of this data sheet for a complete descrip-
tion of read and write modes.
The input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY7C1021 is available in standard 44-pin TSOP Type II
and 400-mil-wide SOJ packages.
7C1021-10
220
0.5
10
5
I/O
I/O
15
1
9
BHE
WE
CE
OE
BLE
San Jose
). If Byte High Enable (BHE) is LOW, then data
– I/O
– I/O
8
16
1
9
7C1021-12
64K x 16 Static RAM
to I/O
through I/O
220
0.5
12
5
8
I/O
I/O
I/O
I/O
V
I/O
I/O
I/O
I/O
V
Pin Configuration
WE
A
A
A
A
NC
CE
. If Byte High Enable (BHE) is LOW,
CC
A
A
A
A
A
SS
15
14
13
12
1
4
3
2
1
0
1
2
3
4
5
6
7
8
CA 95134
through I/O
SOJ / TSOP II
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
10
11
12
16
Top View
0
) is written into the location
7C1021-15
through A
Revised August 24, 2001
220
0.5
15
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
5
16
CY7C1021
9
A
A
A
OE
BHE
BLE
I/O
I/O
I/O
I/O
V
V
I/O
I/O
I/O
I/O
NC
A
A
A
A
NC
) are placed in a
1
15
SS
CC
5
6
7
8
9
10
11
to I/O
1021-2
through I/O
16
15
14
13
12
11
10
9
).
408-943-2600
7C1021-20
16
. See the
220
0.5
20
5
8
), is
0

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CY7C1021-15VC Summary of contents

Page 1

... HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1021 is available in standard 44-pin TSOP Type II and 400-mil-wide SOJ packages. I/O – I/O ...

Page 2

... MAX Max > V – 0.3V 0.5 V > V – 0.3V < 0.3V, f=0 IN Test Conditions MHz 5.0V CC CY7C1021 Ambient [2] Temperature +70 C – +85 C 7C1021-12 7C1021-15 7C1021-20 Min. Max. Min. Max. Min. 2.4 2.4 2.4 0.4 0.4 2.2 6.0 2.2 6.0 2.2 –0.5 0.8 – ...

Page 3

... Document #: 38-05054 Rev 481 255 INCLUDING JIG AND SCOPE (b) 1021-3 167 1.73V 30 pF Over the Operating Range 7C1021-10 Min. Max. Min less than less than t HZCE LZCE HZOE CY7C1021 ALL INPUT PULSES 3.0V 90% 10% GND < 7C1021-12 7C1021-15 7C1021-20 Max. Min. Max. Min ...

Page 4

... Device is continuously selected. OE, CE, BHE and/or BHE = V 10 HIGH for read cycle. 11. Address valid prior to or coincident with CE transition LOW. Document #: 38-05054 Rev OHA [10, 11 ACE t DOE t LZOE t DBE t LZBE 50 CY7C1021 DATA VALID t HZOE t HZCE t HZBE IMPEDANCE DATA VALID t PD 50% 1021-5 HIGH I ICC CC I ISB SB 1021-6 Page ...

Page 5

... Write Cycle No. 2 (BLE or BHE Controlled) ADDRESS t SA BHE, BLE WE CE DATA I/O Notes: 12. Data I/O is high impedance BHE and/or BLE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 38-05054 Rev. ** [12, 13 SCE PWE PWE t SCE . IH CY7C1021 1021 1021-8 Page ...

Page 6

... High Z Read - Lower bits only Data Out Read - Upper bits only Data In Write - All bits High Z Write - Lower bits only Data In Write - Upper bits only High Z Selected, Outputs Disabled High Z Selected, Outputs Disabled CY7C1021 LZWE Mode Power Standby (I Active (I CC Active (I ...

Page 7

... Ordering Information Speed (ns) Ordering Code 10 CY7C1021-10VC CY7C1021-10ZC CY7C1021L-10ZC 12 CY7C1021-12VC CY7C1021-12VI CY7C1021-12ZC 15 CY7C1021-15VC CY7C1021-15VI CY7C1021-15ZC CY7C1021-15ZI CY7C1021L-15ZC 20 CY7C1021-20VC CY7C1021-20ZC Shaded areas contain preliminary information. Package Diagrams Document #: 38-05054 Rev. ** Package Name Package Type V34 44-Lead (400-Mil) Molded SOJ Z44 44-Lead TSOP Type II ...

Page 8

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 44-Pin TSOP II Z44 CY7C1021 51-85087-A Page ...

Page 9

... Document Title: CY7C1021 64K x 16 Static RAM Document Number: 38-05054 Issue REV. ECN NO. Date ** 107156 09/10/01 Document #: 38-05054 Rev. ** Orig. of Change SZV Change from Spec number: 38-00224 to 38-05054 CY7C1021 Description of Change Page ...

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