DS1010C-402 Maxim Integrated Products, DS1010C-402 Datasheet
DS1010C-402
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DS1010C-402 Summary of contents
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FEATURES All-silicon time delay 10 taps equally spaced Delays are stable and precise Leading and trailing edge accuracy Delay tolerance ±5% or ±2 ns, whichever is greater Economical Auto-insertable, low profile Standard 14-pin DIP or 16-pin SOIC Low-power CMOS ...
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LOGIC DIAGRAM Figure 1 PART NUMBER DELAY TABLE (t CATALOG P/N DS1010-50 DS1010-60 DS1010-75 DS1010-80 DS1010-100 DS1010-125 DS1010-150 DS1010-175 DS1010-200 DS1010-250 DS1010-300 DS1010-350 DS1010-400 DS1010-450 DS1010-500 Custom delays available Table 1 PHL PLH TOTAL DELAY 50 60 ...
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ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Ground Operating Temperature Storage Temperature Soldering Temperature Short Circuit Output Current * This is a stress rating only and functional operation of the device at these or any other conditions above ...
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NOTES: 1. All voltages are referenced to ground. 2. Measured with outputs open 25°C. Input-to-tap delays accurate on both rising and falling edges within ± ±5% CC whichever is greater. 4. See “Test ...
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TEST CIRCUIT Figure 3 TERMINOLOGY Period: The time elapsed between the leading edge of the first pulse and the leading edge of the following pulse. t (Pulse Width): The elapsed time on the pulse between the 1.5V point on the ...
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TEST SETUP DESCRIPTION Figure 3 illustrates the hardware configuration used for measuring the timing parameters on the DS1010. The input waveform is produced by a precision pulse generator under software control. Time delays are measured by a time interval counter ...