74LS373

Manufacturer Part Number74LS373
Description3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops 74LS373Octal D-type Transparent Latches(with three-state outputs) 74LS373OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS 74LS373OCTAL TRANSPARENT LAT
ManufacturerNational Semiconductor
74LS373 datasheet
 


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Recommended Operating Conditions

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‘LS373 Switching Characteristics
(See Section 1 for Test Waveforms and Output Load)
Symbol
Parameter
t
Propagation Delay
PLH
Time Low to High
Level Output
t
Propagation Delay
PHL
Time High to Low
Level Output
t
Propagation Delay
PLH
Time Low to High
Level Output
t
Propagation Delay
PHL
Time High to Low
Level Output
t
Output Enable
PZH
Time to High
Level Output
t
Output Enable
PZL
Time to Low
Level Output
t
Output Disable
PHZ
Time from High
Level Output (Note 3)
t
Output Disable
PLZ
Time from Low
Level Output (Note 3)
Note 1 All typicals are at V
5V T
25 C
e
e
CC
A
Note 2 Not more than one output should be shorted at a time and the duration should not exceed one second
Note 3 C
5 pF
e
L

Recommended Operating Conditions

Symbol
Parameter
V
Supply Voltage
CC
V
High Level Input Voltage
IH
V
Low Level Input Voltage
IL
I
High Level Output Current
OH
I
Low Level Output Current
OL
t
Pulse Width
W
(Note 4)
t
Data Setup Time (Notes 1
4)
SU
t
Data Hold Time (Notes 1
4)
H
T
Free Air Operating Temperature
A
Note 1 The symbol (
) indicates the rising edge of the clock pulse is used for reference
Note 4 T
25 C and V
5V
e
e
A
CC
at V
5V and T
25 C
e
e
CC
A
From
R
e
L
(Input)
C
45 pF
e
L
To
Min
Max
(Output)
Data
to
18
Q
Data
to
18
Q
Enable
to
30
Q
Enable
to
30
Q
Output
Control
28
to Any Q
Output
Control
36
to Any Q
Output
Control
20
to Any Q
Output
Control
25
to Any Q
DM54LS374
Min
Nom
Max
4 5
5
5 5
2
0 7
1
b
12
Clock High
15
Clock Low
15
20
1
55
125
b
4
667
C
150 pF
Units
e
L
Min
Max
26
ns
27
ns
38
ns
36
ns
36
ns
50
ns
ns
ns
DM74LS374
Units
Min
Nom
Max
4 75
5
5 25
V
2
V
0 8
V
2 6
mA
b
24
mA
15
ns
15
20
ns
1
ns
0
70
C