LC72720 Sanyo Semiconductor Corporation, LC72720 Datasheet
LC72720
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LC72720 Summary of contents
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... Ordering number : EN *5602 Preliminary Overview The LC72720 and LC72720M are single-chip system LSIs that implement the signal processing required by the European Broadcasting Union RDS (Radio Data System) standard and by the US NRSC (National Radio System Committee) RDBS (Radio Broadcast Data System) standard. These LSIs include band-pass filter, ...
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... Pin Assignment Block Diagram LC72720, 72720M No. 5602-2/14 ...
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... Synchronization and RAM address reset (active high) 14 Vddd Digital system power supply (+ Vssd Digital system ground Note: * Normally function as an output pin. Used as an I/O pin in test mode, which is not available to user applications. LC72720, 72720M Function Serial data interface (CCB) I/O Pin circuit Output Input Output Input — ...
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... Data latch change time Data output time Electrical Characteristics –40 to +85°C, Vssd = Vssa = 0 V Parameter Input resistance Internal feedback resistance Center frequency –3 dB bandwidth Gain Stop band attenuation LC72720, 72720M Symbol Conditions V max Vddd, Vdda max CL, DI, CE, SYR, T1, T2, T3, T4, T5, T6, T7, SYNC ...
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... Not detected (protection function operating) 2. Offset word information flag (3 bits Offset word C’ Unused Unused LC72720, 72720M Symbol Conditions Vref VREF : Vdda = CL, DI, CE, SYR, T1, T2 HIS V 1 DO, T3, T4, T5, T6 SYNC, RDS- CL, DI, CE, SYR XIN : V = Vddd CL, DI, CE, SYR, T1 XIN : DO, SYNC, RDS-ID, T3, T4, T5, T6 ...
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... Caution: If the number of errors exceeds the value of the EC0 to EC2 setting (see the section on the CCB input format), the error information flags will be set to the “Correction not possible” value. 8. RDS data (16 bits D15 This data is output with the MSB first and the LSB last. Caution: When error correction was not possible, the input data is output without change. LC72720, 72720M ...
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... If, during 3 blocks, 2 blocks of offset words were detected in the correct order the offset words were detected in the correct order in 2 consecutive blocks. Initial value LC72720, 72720M IN1 data, first bit IN2 data, first bit (11) Circuit control (5) Error correction method setting (4) RAM write control ...
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... When ARI is present, PL1 should be set to 1, since detection is at 0°. In cases where the ARI presence is known in advance, more stable reproduction can be achieved by fixing the demodulation phase in this manner. LC72720, 72720M Normal write (See the description of the OWE bit.) After the reset is cleared, start writing from the data prior to the establishment of synchronization, i ...
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... Number of error blocks ( ≤ B ≤ < B ≤ < B ≤ 48 These pins indicate the number of blocks in a set of 48 blocks that had errors before correction. The output polarity of these pins is fixed at the values listed in the table. LC72720, 72720M Decoding method T5 T6 RSFT ERROR 57K — ...
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... RDDA output RSFT output Timing 2 (mode 3, PT2 = 0) Input data Sync NG Error crrection SYNC output ERROR output CORREC output LC72720, 72720M The SYNC pin The RDS-ID pin High (1) Low (0) Notes These states are user settable Users cannot use this state Control When set to 1, soft-decision control data (RSFT) is easier to generate. ...
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... SU CL: Normal high Internal data CL: Normal low Internal data Caution: The serial data I/O function can access data only after the crystal oscillator circuit is operating. LC72720, 72720M (MSB · Control data input mode, also referred to as “serial data input” mode. ...
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... The CE, CL, DI, and DO pins can be connected to the corresponding pins on other LSIs that use the CCB interface. (However, we recommend connecting the DO and CE pins separately if the number of available microcontroller ports allows it.) Serial data timing CL: Normal high Intenal data latch CL: Normal low Intenal data latch LC72720, 72720M ≥ 0.75 µ < 0.46 µ ...
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... One method is to read out data from the LC72720 and either check whether meaningful data has been read (if the LC72720 is not requesting a read, data consisting of all zeros will be read out) or check whether the DO level goes low within the 256 µs following the completion of the read (if the DO pin goes low, then the request was from another LSI) ...
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... SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of May, 1997. Specifications and information herein are subject to change without notice. LC72720, 72720M No. 5602-14/14 ...