UPD75216ACW NEC, UPD75216ACW Datasheet

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UPD75216ACW

Manufacturer Part Number
UPD75216ACW
Description
4-BIT SINGLE-CHIP MICROCOMPUTER
Manufacturer
NEC
Datasheet

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Document No.
Date Published February 1994 P
Printed in Japan
(O. D. No.
DESCRIPTION
a fluorescent display tube controller/driver, a watch timer, a timer/pulse generator capable of outputting 14-bit PWM,
a serial interface and a vectored interrupt function integrated on a single-chip.
requiring the timer/watch function and high-speed interrupt servicing. It can help to provide the unit with many
functions and to decrease performance costs.
FEATURES
APPLICATION FIELD
PD75208.
Architecture equal to that of an 8-bit microcomputer
High-speed operation : Minimum instruction execution time : 0.95 s (when operated at 4.19 MHz)
Instruction execution time variable function realizing a wide range of operating voltages
On-chip large-capacity program memory : 16K bytes
Watch operation with an ultra low current consumption : 5 A TYP. (at the 3 V operation)
On-chip programmable fluorescent display tube controller/driver
Timer function : 4 ch
• 14-bit PWM output capability with the voltage synthesizer type electronic tuner
• Buzzer output capability
Interrupt function with importance attached to applications
• For power-off detection
• For remote controlled reception
Product with an on-chip PROM : PD75P216A, PD75P218 (on-chip EPROM : WQFN package)
The PD75216A is a microcomputer with a CPU capable of 1-, 4-, and 8-bit data processing, ROM, RAM, I/O ports,
The PD75216A is a product with the ROM capacity and the number of display segments extended for the
It uses the VCR, ECR and CD fluorescent display tubes as display devices and is most suitable for applications
Functions are described in detail in the following User’s Manual. Be sure to read when carrying out design work.
VCR, CD player, ECR, etc.
IC-1999C
IC-7177D)
4-BIT SINGLE-CHIP MICROCOMPUTER
The information in this document is subject to change without notice.
PD75216A User’s Manual: IEM-988
The mark
shows major revised points.
DATA SHEET
MOS INTEGRATED CIRCUIT
PD75216A
© NEC Corporation 1990

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UPD75216ACW Summary of contents

Page 1

... VCR, CD player, ECR, etc. Document No. IC-1999C (O. D. No. IC-7177D) Date Published February 1994 P Printed in Japan DATA SHEET MOS INTEGRATED CIRCUIT PD75216A User’s Manual: IEM-988 The information in this document is subject to change without notice. The mark shows major revised points. PD75216A © NEC Corporation 1990 ...

Page 2

... Remarks is a ROM code number. Please refer to “Quality grade on NEC Semiconductor Devices” (Document number IEI-1209) published by NEC Corporation to know the specification of quality grade on the devices and its recommended applications. 2 Package 64-pin plastic shrink DIP (750 mil) 64-pin plastic QFP (14 ...

Page 3

LIST OF FUNCTIONS Item Instruction execution time • 0.95, 1.91, 15.3 s (Main system clock : 4.19 MHz operation) • 122 s (Subsystem clock : 32.768 kHz operation) On-chip memory ROM 16256 RAM 512 4 bits General register • 4-bit ...

Page 4

PIN CONFIGURATION (TOP VIEW) ......................................................................................................... 6 2. BLOCK DIAGRAM ...................................................................................................................................... 8 3. PIN FUNCTIONS ........................................................................................................................................ 9 3.1 PORT PINS ............................................................................................................................................................. 9 3.2 NON-PORT PINS .................................................................................................................................................. 10 3.3 PIN INPUT/OUTPUT CIRCUIT LIST .................................................................................................................... 11 3.4 UNUSED PINS TREATMENT .............................................................................................................................. 12 ...

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RECOMMENDED SOLDERING CONDITIONS ........................................................................................ 66 APPENDIX A. LIST OF PD75216A SERIES PRODUCT FUNCTIONS ........................................................ 67 APPENDIX B. DEVELOPMENT TOOLS ......................................................................................................... 69 APPENDIX C. RELATED DOCUMENTS ......................................................................................................... 70 PD75216A 5 ...

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PIN CONFIGURATION (TOP VIEW) P00/INT4 P01/SCK P02/SO P03/SI P10/INT0 P11/INT1 P12/INT2 P13/TI0 P23/BUZ P41 52 P42 53 P43 54 PPO ...

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PIN NAME P00-P03 : Port 0 P10-P13 : Port 1 P20-P23 : Port 2 P30-P33 : Port 3 P40-P43 : Port 4 P50-P53 : Port 5 P60-P63 : Port 6 PH0-PH3 : Port H T0-T15 : Digit Output 0-15 S0-S15 ...

Page 8

BASIC INTERVAL TIMER PROGRAM INTBT COUNTER(14) TI0/P13 TIMER/EVENT COUNTER #0 INTT0 TIMER/PULSE GENERATOR PPO INTTPG PROGRAM MEMORY SI/P03 16256 SERIAL SO/P02 INTERFACE SCK/P01 INTSIO INT0/P10 INT1/P11 INTERRUPT INT2/P12 CONTROL INTW INT4/P00 WATCH TIMER BUZ/P23 CY ALU GENERAL REG. ROM DECODE ...

Page 9

PIN FUNCTIONS 3.1 PORT PINS Dual- Pin Name I/O Function Pin P00 Input INT4 P01 Input/output SCK P02 Input/output SO P03 Input SI P10 INT0 Input P11 INT1 P12 INT2 P13 TI0 P20 Input/ ––– output P21 ––– P22 ...

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... Edge-detected testable input (rising edge detection). Fixed frequency output (for buzzer or system clock trimming). Crystal/ceramic connect pin for main system clock oscillation. External clock input to X1 and its inverted clock input to X2. Crystal connect pin for subsystem clock oscillation. ...

Page 11

PIN INPUT/OUTPUT CIRCUIT LIST TYPE P-ch IN N-ch CMOS-Specified Input Buffer TYPE B IN Schmitt-Triggered Input Having Hysteresis Characteristics TYPE D data output disable Push-Pull Output which can be Set to Output High Impedance (with Both ...

Page 12

... T15/S10 to T14/S11 T10/S15/PH3 to T13/S12/PH0 XT1 XT2 RESET when there is an on- chip power-on reset circuit V when there is no on- LOAD chip load resistor 12 Recommended Connection Connect Connect Connect Input state : Connect Ouput state : Leave open Leave open Connect Leave open Connect Connect PD75216A ...

Page 13

... P50 and XT2 pins and the correct watch functions cannot be achieved (the watch becomes fast necessary to allow the P50 pin signal to switch between high and low, mount an external capacitor to the P50 pin as shown below. is applied to one of these pins. If noise larger than V DD • ...

Page 14

MEMORY CONFIGURATION Program memory (ROM) ................................. 16256 words • 0000H to 0001H : Vector table for writing program start address by reset • 0002H to 000FH : Vector table for writing program start address by interrupt • 0020H to ...

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MBE RBE Internal Reset Start Address (Most Significant 6 Bits) Internal Reset Start Address (Least Significant 8 Bits MBE RBE INTBT/INT4 ...

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Stack Area General Static RAM (512 4) Display Data Memory, etc. 16 Fig. 4-2 Data Memory Map General Register (32 Area 256 ...

Page 17

PERIPHERAL HARDWARE FUNCTIONS 5.1 PORTS I/O ports have the following three functions. CMOS input (PORT0, 1) CMOS input/output (PORT2 P-ch open-drain, high-voltage, high-current output (PORTH Total Port Name Function PORT0 4-bit input Always ...

Page 18

CLOCK GENERATOR The clock generator operations are determined by the processor clock control register (PCC) and the system clock control register (SCC). The clock generator has two types: main system clock and subsystem clock. The instruction execution time can ...

Page 19

BASIC INTERVAL TIMER The basic interval timer has the following functions: Interval timer operation to generate reference time Watchdog timer application to detect inadvertent program loop Wait time select and count upon standby mode release Count contents read Fig. ...

Page 20

WATCH TIMER The PD75216A incorporates one channel of watch timer. The watch timer has the following functions. Sets the test flag (IRQW) at 0.5 sec intervals. The standby mode can be released by IRQW. 0.5 second interval can be ...

Page 21

TIMER/EVENT COUNTER The PD75216A incorporates one channel of timer/event counter. The timer/event counter has the following functions. Program interval timer operation Event counter operation Count state read function Fig. 5-4 Timer/Event Counter Block Diagram TMn7 TMn6 TMn5 TMn4 TMn3 ...

Page 22

... MHz operation) interrupt generation pulse output is not necessary, the PPO pin can be used as a 1-bit output port. Note If the STOP mode is set while the timer/pulse generator is in operation, miss-operation may result. To prevent that from occurring, preset the timer/pulse generator to the stop state using its mode register ...

Page 23

Fig. 5-6 Timer/Pulse Generator Block Diagram (PWM Pulse Generation Mode) Modulo Register H (8) TPGM3 MODH (8) TPGM1 f 1/2 x Frequency Divider 5.7 SERIAL INTERFACE The PD75216A serial interface has the following functions. Clock synchronous 8-bit send/receive operation (simultaneous ...

Page 24

P03/SI SIO0 Shift Register (8) *1 P02/SO P01/SCK * 1. CMOS output and N-ch open drain output switchable output buffer. 2. Instruction execution Fig 5-7 Serial Interface Block Diagram Internal Bus 8 SIO7 SIO SIOM7SIOM6SIOM5SIOM4SIOM3SIOM2SIOM1SIOM0 SO Output Latch Overflow ...

Page 25

FIP CONTROLLER/DRIVER The on-chip FIP controller/driver has the following functions: Generates the segment and digit signals by automatically reading the display data memory executing DMA operation. Can select total of 26 display devices in the range ...

Page 26

Fig. 5-8 FIP Controller/Driver Block Diagram Display Data Memory (64 4 Bits) Key Scan Registers (KS0, KS1) 12 Segment Data Latch (16) 10 High-Voltage Output Buffer 10 S0-S9 Note The FIP controller/driver can only operate in the high and intermediate-speeds ...

Page 27

POWER-ON FLAG (MASK OPTION) The power-on flag (PONF) is automatically set (1) when the power-on reset circuit is activated and the power- on reset signal is generated (See Fig. 8-1 Reset Signal Generator). The PONF is mapped at bit ...

Page 28

INTERRUPT FUNCTIONS The PD75216A has eight types of interrupt sources and can generate multiple interrupts with priority order also equipped with two types of test sources. INT2 is an edge detected testable input. The PD75216A interrupt control ...

Page 29

Fig. 6-1 Interrupt Control Circuit Block Diagram 2 2 IM1 IM0 Interrupt Enable Flag (IE INT IRQBT BT Both Edges INT4 IRQ4 Detection /P00 Circuit Edge INT0 Detection IRQ0 * /P10 Circuit Edge INT1 IRQ1 * Detection /P11 Circuit INTSIO ...

Page 30

STANDBY FUNCTIONS Two standby modes (STOP mode and HALT mode) are available for the consumption in the program standby mode. Table 7-1 Operation Status in Standby Mode Set instruction STOP instruction System clock when set Setting enabled only with ...

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RESET FUNCTIONS The reset signal (RES) generator has a configuration shown in Fig. 8-1. RESET Power-On Reset Generator The power-on reset generator is a circuit to generate a one-shot pulse upon detection of the start-up of the power voltage. ...

Page 32

Fig. 8-2 Reset Operation by Power-On Reset Supply Voltage 0 V Internal Reset Signal (RES) * Wait time does not include a time from RES signal generation to oscillation start. Fig. 8-3 Reset Operation by RESET Input RESET Input Operating ...

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Table 8-1 Hardware Statuses after Reset Hardware Program counter (PC) PSW Carry flag (CY) Skip flag (SK0 to SK2) Interrupt status flag (IST0, IST1) Bank enable flags (MBE, RBE) Stack pointer (SP) Data memory (RAM) General registers ( ...

Page 34

INSTRUCTION SET (1) Operand identifier and description Enter an operand in the operand column of each instruction using the description method relating to the operand identifier of the instruction (For details, refer to RA75X Assembler Package User’s Manual Language ...

Page 35

Legend for operation description register; 4-bit accumulator register register register register register register register XA ...

Page 36

Description of symbols in the addressing area column * MBE • MBS (MBS = MBE = (00H to 7FH ...

Page 37

Mnemonic Operands Note 1 MOV A, #n4 reg1, #n4 XA, #n8 HL, #n8 rp2, #n8 A, @HL A, @HL+ A, @HL– A, @rpa1 XA, @HL @HL, A @HL mem XA, mem mem, A mem reg XA, ...

Page 38

Note Mnemonic Operand MOV1 CY, fmem.bit CY, pmem.@L CY, @H+mem.bit fmem.bit, CY pmem.@L, CY @H+mem.bit, CY ADDS A, #n4 XA, #n8 A, @HL XA, rp' rp'1, XA ADDC A, @HL XA, rp' rp'1, XA SUBS A, @HL XA, rp' rp'1, ...

Page 39

Note 1 Mnemonic Operands RORC A A NOT INCS reg rp1 @HL mem DECS reg rp' SKE reg, #n4 @HL, #n4 A, @HL XA, @HL A, reg XA.rp' SET1 CY CLR1 CY SKT CY NOT1 CY Note 1. Instruction Group ...

Page 40

Note Mnemonic Operands SET1 mem.bit fmem.bit pmem.@ mem.bit mem.bit CLR1 fmem.bit pmem.@L @H+mem.bit SKT mem.bit fmem.bit pmem.@L @H+mem.bit SKF mem.bit fmem.bit pmem.@L @H+mem.bit SKTCLR fmem.bit pmem.@L @H+mem.bit AND1 CY, fmem.bit CY, pmem.@L CY, @H+mem.bit CY, fmem.bit OR1 CY, ...

Page 41

Note Mnemonic Operands CALL !addr CALLF !faddr RET RETS RETI PUSH rp BS POP PORTn * XA, PORTn OUT PORTn PORTn, XA HALT STOP NOP SEL RBn MBn * MBE ...

Page 42

Note Mnemonic Operands GETI * taddr * TBR and TCALL instructions are assembled pseudo-instructions to define the GETI instruction table. Note Instruction Group 42 No. of Machine Operation Bytes Cycle 1 3 • TBR instruction PC (taddr) +(taddr+1) 13–0 4–0 ...

Page 43

MASK OPTION SELECTION The PD75216A has the following mask options enabling or disabling on-chip components. (1) Pin Pin P60 to P63 T0/T9 T10/S15/PH3 to T13/S12/PH0 T14/S11, T15/S10 XT1, XT2 Note system not using ...

Page 44

APPLICATION BLOCK DIAGRAM 11.1 VCR TIMER TUNER Main Power Supply Power Failure Detection LPF Electronic Tuner Tape Count Pulse Tape Up/Down SCK System Controller SO Microcomputer SI PD75104/75106 EEPROM™ PD6252 44 + Super Capacitor INT4 ...

Page 45

CD PLAYER SIO SCK Servo SI/SO Control IC Loading Circuit BUZ BZ X1 11.3 ECR Main Power Supply Power Failure Detection RAM Printer 14 T0–S13 Fluorescent Display Panel (FIP) S0–S11 12 12 Segments PD75216A Key Matrix PORT6 (12 INT0 ...

Page 46

ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ( PARAMETER SYMBOL Power supply voltage LOAD V PRE Input voltage Output voltage V OD Output current high I OH Output current low I ...

Page 47

... In this example, since the allowable total loss is 600 mW for the shrink DIP package necessary to decrease power consumption by decreasing the number of on-chip pull-down resistors. In this example, power consumption can be adjusted to 577 incorporating pull-down resistors in only 11 digit outputs and 7 segment outputs and externally mounting pull-down resistors to the 2 remaining segment outputs ...

Page 48

... DD < – 5.0 MHz”, do not select “PCC = 0011” as instruction execution time. XX PD75216A = 2 MIN. TYP. MAX. UNIT 2.0 5.0 MHz 4 ms 2.0 4.19 5.0 *4 MHz 5.0 MHz 2.0 250 100 not connect SS ...

Page 49

... PARAMETER TEST CONDITIONS Oscillator frequency ( 4 Oscillation stabilization time *3 XT1 input frequency ( XT1 input high and low level widths ( XTH XTL PD75216A = 2 MIN. TYP. MAX. UNIT 35 kHz 32 32.768 kHz 100 reaches the not connect SS 49 ...

Page 50

RECOMMENDED OSCILLATOR CONSTANTS MAIN SYSTEM CLOCK : CERAMIC OSCILLATOR (Ta = –40 to +85 C) MANUFACTURER PRODUCT NAME CSA 2.00MG CSA 4.19MG CSA 4.91MG Murata Mfg. Co., Ltd. CST 2.00MG CST 4.19MG CST 4.91MG KBR–2.0MS KBR–4.0MS Kyocera Corp. KBR–4.19MS KBR–4.19MS ...

Page 51

DC CHARACTERISTICS (Ta = – PARAMETER SYMBOL V IH1 V IH2 Input voltage high V IH3 V IH4 V IL1 V Input Voltage low IL2 V IL3 Output voltage high V OH Output voltage low V ...

Page 52

... Power-on reset circuit*2 I DDPR current consumption (31 4.19 MHz Current with on-chip power-on reset circuit or power-on flag Remarks Start the power supply smoothly RD9, 1EL RD9, 1EL :Zener Diode (NEC) Zener Voltage = 8. –30 V TEST CONDITIONS 2 off t r PD75216A MIN. TYP. MAX. ...

Page 53

AC CHARACTERISTICS (Ta = – PARAMETER SYMBOL CPU clock cycle time (minimum instruction t CY execution time = 1 machine cycle TI0 input frequency TIH TI0 input high and low- ...

Page 54

... CPU clock ( ) cycle time is determined by the oscillator frequency of the connected resonator, the system clock control register (SCC) and the processor clock control register (PCC). The cycle time t characteristics for power supply voltage CY V when the main system clock is in operation is DD shown below ...

Page 55

AC Timing Test Points (Except X1 and XT1 Inputs) 0.75 V 0.2 V Clock Timing X1 Input XT1 Input TI0 Timing TI0 0. Test Points ...

Page 56

Serial Transfer Timing SCK SI SO Interrupt Input Timing INT0,1,2,4 RESET Input Timing RESET 56 t KCY SIK KSI Input Data t KSO Output Data t t INTL INTH t RSL PD75216A ...

Page 57

DATA MEMORY STOP MODE LOW POWER SUPPLY VOLTAGE DATA RETENTION CHARACTERISTICS (Ta = –40 to +85 C) PARAMETER SYMBOL Data retention power V DDDR supply voltage Data retention power I DDDR supply current *1 Release signal set time t SREL ...

Page 58

Data Retention Timing (Standby Release Signal: STOP Mode Release by Interrupt Signal STOP Instruction Execution Standby Release Signal (Interrupt Request) 58 HALT Mode STOP Mode Data Retention Mode t V SREL DDDR PD75216A Operating Mode t WAIT ...

Page 59

CHARACTERISTIC CURVES 5000 1000 500 100 Remarks Values of the processor clock control register (PCC) is indicated in parenthesis 4.19 MHz ...

Page 60

–20 V – –10 – (Ports ...

Page 61

(Ports Output Voltage Low – ...

Page 62

(T0 to T15 – PRE V – PRE ...

Page 63

PACKAGE INFORMATION 64 PIN PLASTIC SHRINK DIP (750 mil NOTE 1) Each lead centerline is located within 0.17 mm (0.007 inch) of its true position (T.P.) at maximum material condition. 2) Item "K" ...

Page 64

PIN PLASTIC QFP (14 20 NOTE Each lead centerline is located within 0.20 mm (0.008 inch) of its true position (T.P.) at maximum material condition. 64 detail of ...

Page 65

... View Note 1. Care is needed since the metal cap is con- nected to pin 26 and set to the positive power supply level. 2. Care is needed since the lead of the base is formed obliquely. 3. The lead length is not stipulated since the cutting of the lead ends is not progress- controlled. ...

Page 66

... Notice A Version of this product with improved recommended soldering condition is available. For details (improvements such as infrared reflow peak temperature extension (235 C), number of times: twice, relaxation of time limit, etc.), contact NEC sales personnel. Table 15-2 Insertion Type Soldering Conditions PD75216ACW- : 64-pin plastic shrink DIP (750 mil) ...

Page 67

APPENDIX A. LIST OF PD75216A SERIES PRODUCT FUNCTIONS Product Name PD75206 Item ROM (byte) 6016 RAM ( 4 bits) 369 Instruction cycle • 0.95, 1.91, 15.3 s (Main system clock : 4.19 operation) • 122 s (Subsystem clock : 32.768 ...

Page 68

Can be operated at 6.0 MHz. If used in 16K mode, can be used for evaluation and limited production of the PD75216A series. 68 PD75216A ...

Page 69

... PROM programmer PROM programmer adapter for PD75P216ACW/75P218CW in connection with PG-1500 PROM programmer adapter for PD75P218GF in connection with PG-1500 PROM programmer adapter for PD75P218KB in connection with PG-1500. Host machine • PC-9800 series (MS-DOS™ Ver.3.30 to Ver.5.00A*3) • IBM PC/AT™ (PC DOS™ Ver.3.1) ...

Page 70

... Other Documents Document Name Package Manual Surface Mount Technology Manual Quality Grade on NEC Semiconductor Devices NEC Semiconductor Device Reliability & Quality Control Electrostatic Discharge (ESD) Test Semiconductor Devices Quality Guarantee Guide Microcomputer Related Products Guide Other Manufactures Volume Note The contents of the above related documents are subjected to change without notice. The latest documents should be used for design, etc ...

Page 71

PD75216A 71 ...

Page 72

... If customers intend to use NEC devices for above applications or they intend to use "Standard" quality grade NEC devices for applications not intended by NEC, please contact or they intend to use "Standard" quality grade NEC devices for applications not intended by NEC, please contact our sales people in advance ...

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