UPD75216ACW

Manufacturer Part NumberUPD75216ACW
Description4-BIT SINGLE-CHIP MICROCOMPUTER
ManufacturerNEC
UPD75216ACW datasheet
 


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A d d r e s s
7
6
0 0 0 0 H
MBE
RBE
Internal Reset Start Address (Most Significant 6 Bits)
Internal Reset Start Address (Least Significant 8 Bits)
0 0 0 2 H
MBE RBE
INTBT/INT4 Start Address
INTBT/INT4 Start Address
0 0 0 4 H
MBE RBE
INT0 Start Address
INT0 Start Address
0 0 0 6 H
MBE RBE
INT1 Start Address
INT1 Start Address
0 0 0 8 H
MBE RBE
INTCSI0 Start Address
INTCSI0 Start Address
0 0 0 A H
MBE RBE
INTT0 Start Address
INTT0 Start Address
0 0 0 C H
MBE RBE
INTTPG Start Address
INTTPG Start Address
0 0 0 E H
MBE RBE
INTKS Start Address
INTKS Start Address
0 0 2 0 H
GETI Instruction Reference Table
0 0 7 F H
0 0 8 0 H
0 7 F F H
0 8 0 0 H
0 F F F H
1 0 0 0 H
1 F F F H
2 0 0 0 H
2 F F F H
3 0 0 0 H
3 F 7 F H
Remarks
In all cases other than those listed above, branch to the address with only the lower 8 bits of the PC
changed is enabled by BR PCDE and BR PCXA instructions.
Fig. 4-1 Program Memory Map
0
(Most Significant 6 Bits)
CALLF
(Least Significant 8 Bits)
!faddr
(Most Significant 6 Bits)
Instruction
Entry Address
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
BRCB
!caddr Instruction
Branch Address
BRCB
!caddr Instruction
Branch Address
BRCB
!caddr Instruction
Branch Address
PD75216A
BRCB
!caddr
Instruction
Branch Address
CALL !addr
Instruction
Subroutine Entry
Address
BR !addr
Instruction
Branch Address
BR $ addr Instruction
Relative Branch
Address
(-15 to -1 and +2 to +16)
Branch Destination
Address and
Subroutine Entry
Address to be Set
by GETI Instruction
15