L8C201PC25 Logic Devices Inc., L8C201PC25 Datasheet

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L8C201PC25

Manufacturer Part Number
L8C201PC25
Description
Manufacturer
Logic Devices Inc.
Datasheet

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L8C201PC25
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DEVICES INCORPORATED
FEATURES
W
XI
L8C201/202/203/204 B
R
DEVICES INCORPORATED
First-In/First-Out (FIFO) using
Dual-Port Memory
Advanced CMOS Technology
High Speed — to 10 ns Access Time
Asynchronous and Simultaneous
Read and Write
Fully Expandable by both Word
Depth and/or Bit Width
Empty and Full Warning Flags
Half-Full Flag Capability
Auto Retransmit Capability
Package Styles Available:
• 28-pin Plastic DIP
• 32-pin Plastic LCC
• 28-pin Ceramic Flatpack
CONTROL
WRITE
CONTROL
READ
EXPANSION
LOGIC
LOGIC
FLAG
POINTER
WRITE
LOCK
D
DATA OUTPUTS
IAGRAM
DATA INPUTS
512/1K/2K/4K x 9-bit Asynchronous FIFO
RAM ARRAY
THREE-STATE
512 x 9-bit
1K x 9-bit
2K x 9-bit
4K x 9-bit
The L8C201, L8C202, L8C203, and
L8C204 are dual-port First-In/First-
Out (FIFO) memories. The FIFO
memory products are organized as:
Each device utilizes a special algorithm
that loads and empties data on a first-
in/first-out basis. Full and Empty flags
are provided to prevent data overflow
and underflow. Three additional pins
are also provided to allow for unlimited
expansion in both word size and depth.
Depth Expansion does not result in a
flow-through penalty. Multiple devices
are connected with the data and control
signals in parallel. The active device is
determined by the Expansion In (XI)
and Expansion Out (XO) signals which
are daisy chained from device to
device.
BUFFERS
D
Q
L8C201 — 512 x 9-bit
L8C202 — 1024 x 9-bit
L8C203 — 2048 x 9-bit
L8C204 — 4096 x 9-bit
9
DESCRIPTION
8-0
8-0
FF
XO/HF
EF
POINTER
READ
512/1K/2K/4K x 9-bit Asynchronous FIFO
1
RESET
LOGIC
L8C201/202/203/204
RS
FL/RT
The read and write operations are
internally sequential through the use
of ring pointers. No address informa-
tion is required to load and unload
data. The write operation occurs
when the Write (W) signal is LOW.
Read occurs when Read (R) goes
LOW. The nine data outputs go to the
high impedance state when R is
HIGH. Retransmit (RT) capability
allows for reset of the read pointer
when RT is pulsed LOW, allowing for
retransmission of data from the
beginning. Read Enable (R) and Write
Enable (W) must both be HIGH
during a retransmit cycle, and then R
is used to access the data. A Half-Full
(HF) output flag is available in the
single device and width expansion
modes. In the depth expansion
configuration, this pin provides the
Expansion Out (XO) information
which is used to tell the next FIFO that
it will be activated.
These FIFOs are designed to have the
fastest data access possible. Even in
lower cycle time applications, faster
access time can eliminate timing
bottlenecks as well as leave enough
margin to allow the use of the devices
without external bus drivers.
The FIFOs are designed for those
applications requiring asychronous
and simultaneous read/writes in
multiprocessing and rate buffer
applications.
L8C201/202/203/204
FIFO Products
03/04/99–LDS.8C201/2/3/4-H

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L8C201PC25 Summary of contents

Page 1

DEVICES INCORPORATED DEVICES INCORPORATED FEATURES First-In/First-Out (FIFO) using Dual-Port Memory Advanced CMOS Technology High Speed — Access Time Asynchronous and Simultaneous Read and Write Fully Expandable by both Word Depth and/or Bit Width Empty and Full Warning ...

Page 2

DEVICES INCORPORATED SIGNAL DEFINITIONS Inputs RS — Reset Reset is accomplished whenever the Reset (RS) input is taken to a LOW state. During reset, both internal read and write pointers are set to the first location. A reset is required ...

Page 3

DEVICES INCORPORATED OPERATING MODES Single Device Mode A single FIFO may be used when the application requirements are for the number of words in a single device. The FIFOs are in a Single Device Configuration when the Expansion In (XI) ...

Page 4

DEVICES INCORPORATED M R Above which useful life may be impaired (Notes 1, 2) AXIMUM ATINGS Storage temperature ........................................................................................................... –65°C to +150°C Operating ambient temperature ........................................................................................... –55°C to +125°C V supply voltage with respect to ground ............................................................................ –0 ...

Page 5

DEVICES INCORPORATED SWITCHING CHARACTERISTICS SYNCHRONOUS AND ESET IMING Symbol Parameter t Read Cycle Time (MHz) RLRL t Read Low to Output Valid (Access Time) RLQV t Read High to Read Low (Notes 8, 9) RHRL t Read ...

Page 6

DEVICES INCORPORATED SWITCHING CHARACTERISTICS ULL MPTY LAG AND ETRANSMIT Symbol Parameter t Read Low to Output Valid (Access Time) RLQV t Read Low to Empty Flag Low RLEL t Read High to Full Flag High RHFH ...

Page 7

DEVICES INCORPORATED SWITCHING CHARACTERISTICS ULL ALF ULL MPTY LAG Symbol Parameter t Read High to Full Flag High RHFH t Read Pulse Width After Empty Flag High EHRH t Read High to Half-Full Flag ...

Page 8

DEVICES INCORPORATED SWITCHING CHARACTERISTICS E T (ns) XPANSION IMING Symbol Parameter t Read/Write to Expansion Out Low ALOL t Read/Write to Expansion Out High AHOH t Expansion In Pulse Width (Notes 9, 11) XLXH t Expansion In High to Expansion ...

Page 9

DEVICES INCORPORATED SWITCHING CHARACTERISTICS SYNCHRONOUS AND ESET IMING Symbol Parameter t Read Cycle Time (MHz) RLRL t Read Low to Output Valid (Access Time) RLQV t Read High to Read Low (Notes 8, 9) RHRL t Read ...

Page 10

DEVICES INCORPORATED SWITCHING CHARACTERISTICS ULL MPTY LAG AND ETRANSMIT Symbol Parameter t Read Low to Output Valid (Access Time) RLQV t Read Low to Empty Flag Low RLEL t Read High to Full Flag High RHFH ...

Page 11

DEVICES INCORPORATED SWITCHING CHARACTERISTICS ULL ALF ULL MPTY LAG Symbol Parameter t Read High to Full Flag High RHFH t Read Pulse Width After Empty Flag High EHRH t Read High to Half-Full Flag ...

Page 12

DEVICES INCORPORATED SWITCHING CHARACTERISTICS E T (ns) XPANSION IMING Symbol Parameter t Read/Write to Expansion Out Low ALOL t Read/Write to Expansion Out High AHOH t Expansion In Pulse Width (Notes 9, 11) XLXH t Expansion In High to Expansion ...

Page 13

DEVICES INCORPORATED F 1. FIFO M (D IGURE EMORY W D 8-0 FULL ABLE ESET AND ETRANSMIT INPUTS MODE RS RT Reset 0 X Retransmit 1 0 Read/Write ...

Page 14

DEVICES INCORPORATED NOTES 1. Maximum Ratings indicate stress specifi- cations only. Functional operation of these products at values beyond those indicated in the Operating Conditions table is not implied. Exposure to maximum rating con- ditions for extended periods may affect ...

Page 15

... GND 14 Plastic DIP (P10) Speed 0°C to +70°C — C OMMERCIAL 25 ns L8C201PC25 15 ns L8C201PC15 12 ns L8C201PC12 10 ns L8C201PC10 –40°C to +85°C — C OMMERCIAL 25 ns L8C201PI25 15 ns L8C201PI15 12 ns L8C201PI12 10 ns L8C201PI10 512/1K/2K/4K x 9-bit Asynchronous FIFO 28-pin — 0.6" wide FL/RT ...

Page 16

DEVICES INCORPORATED L8C201 — ORDERING INFORMATION 32-pin — 0.490" x 0.590" Top FF 9 View ...

Page 17

DEVICES INCORPORATED L8C202 — ORDERING INFORMATION 28-pin — 0.3" wide ...

Page 18

DEVICES INCORPORATED L8C202 — ORDERING INFORMATION 32-pin — 0.490" x 0.590" Top FF 9 View ...

Page 19

DEVICES INCORPORATED L8C203 — ORDERING INFORMATION 28-pin — 0.3" wide ...

Page 20

DEVICES INCORPORATED L8C203 — ORDERING INFORMATION 32-pin — 0.490" x 0.590" Top FF 9 View ...

Page 21

DEVICES INCORPORATED L8C204 — ORDERING INFORMATION 28-pin — 0.3" wide ...

Page 22

DEVICES INCORPORATED L8C204 — ORDERING INFORMATION 32-pin — 0.490" x 0.590" Top FF 9 View ...

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