24C08 STMicroelectronics, 24C08 Datasheet

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24C08

Manufacturer Part Number
24C08
Description
24C088 Kbit Serial I2C Bus EEPROM with User-Defined Block Write Protection
Manufacturer
STMicroelectronics
Datasheet

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DESCRIPTION
This specification covers a range of 8 Kbits I
EEPROM products, the ST24/25C08 and the
ST24/25W08. In the text, products are referred to
as ST24/25x08, where "x" is: "C" for Standard
version and "W" for Hardware Write Control ver-
sion.
Table 1. Signal Names
February 1999
PRE
E
SDA
SCL
MODE
WC
V
V
1 MILLION ERASE/WRITE CYCLES with
40 YEARS DATA RETENTION
SINGLE SUPPLY VOLTAGE:
– 3V to 5.5V for ST24x08 versions
– 2.5V to 5.5V for ST25x08 versions
HARDWARE WRITE CONTROL VERSIONS:
ST24W08 and ST25W08
PROGRAMMABLE WRITE PROTECTION
TWO WIRE SERIAL INTERFACE, FULLY I
BUS COMPATIBLE
BYTE and MULTIBYTE WRITE (up to 8
BYTES)
PAGE WRITE (up to 16 BYTES)
BYTE, RANDOM and SEQUENTIAL READ
MODES
SELF TIMED PROGRAMMING CYCLE
AUTOMATIC ADDRESS INCREMENTING
ENHANCED ESD/LATCH UP
PERFORMANCES
CC
SS
Write Protect Enable
Chip Enable Input
Serial Data Address Input/Output
Serial Clock
Multibyte/Page Write Mode
(C version)
Write Control (W version)
Supply Voltage
Ground
with User-Defined Block Write Protection
2
C bus
2
C
8 Kbit Serial I
Figure 1. Logic Diagram
Note: WC signal is only available for ST24/25W08 products.
MODE/WC*
ST24W08, ST25W08
0.25mm Frame
PSDIP8 (B)
ST24C08, ST25C08
8
PRE
SCL
E
1
2
V CC
C Bus EEPROM
V SS
ST24x08
ST25x08
150mil Width
SO8 (M)
8
1
AI00860E
SDA
1/16

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24C08 Summary of contents

Page 1

... Serial Data Address Input/Output SCL Serial Clock Multibyte/Page Write Mode MODE (C version) WC Write Control (W version) V Supply Voltage CC V Ground SS February 1999 ST24C08, ST25C08 ST24W08, ST25W08 8 Kbit Serial I with User-Defined Block Write Protection PSDIP8 (B) 0.25mm Frame Figure 1. Logic Diagram 2 C bus E PRE SCL MODE/WC* Note: WC signal is only available for ST24/25W08 products ...

Page 2

... These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. ...

Page 3

Table 3. Device Select Code Bit b7 Device Select 1 Note: The MSB b7 is sent first. (1) Table 4. Operating Modes Mode RW bit Current Address Read ’1’ ’0’ Random Address Read ’1’ Sequential Read ’1’ Byte Write ’0’ ...

Page 4

ST24/25C08, ST24/25W08 SIGNAL DESCRIPTIONS (cont’d) The devices with this Write Control feature no longer support the Multibyte Write mode of opera- tion, however all other write modes are fully sup- ported. Refer to the AN404 Application Note for more de- ...

Page 5

Table 5. Input Parameters Symbol C Input Capacitance (SDA Input Capacitance (other pins Input Impedance (ST24/25W08) WCL Z WC Input Impedance (ST24/25W08) WCH Low-pass filter input time constant t LP (SDA and SCL) Note: ...

Page 6

ST24/25C08, ST24/25W08 Table 7. AC Characteristics ( – – Symbol Alt t t Clock Rise Time CH1CH2 Clock Fall Time CL1CL2 F t ...

Page 7

Figure 5. AC Waveforms SCL SDA IN START CONDITION SCL tCLQV SDA OUT SCL SDA IN tCHDH STOP CONDITION Write Operations The Multibyte Write mode (only available on the ST24/25C08 versions) is selected when the MODE pin ...

Page 8

ST24/25C08, ST24/25W08 2 Figure Bus Protocol SCL SDA START CONDITION SCL MSB SDA START CONDITION 1 SCL MSB SDA Multibyte Write. For the Multibyte Write mode, the MODE pin must The Multibyte Write ...

Page 9

After each byte is transfered, the internal byte address counter (4 least significant bits only) is incremented. The transfer is terminated by the master generating a STOP condition. Care must ...

Page 10

ST24/25C08, ST24/25W08 Figure 9. Write Modes Sequence (ST24/25C08) BYTE WRITE MULTIBYTE AND PAGE WRITE DEVICE OPERATION (cont’d) The sequence is as follows: – Initial condition: a Write is in progress (see Fig- ure 8). – Step 1: the Master issues ...

Page 11

Figure 10. Write Modes Sequence with Write Control = 1 (ST24/25W08) WC BYTE WRITE WC PAGE WRITE WC (cont'd) PAGE WRITE (cont'd) Read Operations Read operations are independent of the state of the MODE pin. On delivery, the memory content ...

Page 12

ST24/25C08, ST24/25W08 DEVICE OPERATION (cont’d) master must NOT acknowledge the last byte out- put, but MUST generate a STOP condition. The output data is from consecutive byte addresses, with the internal byte address counter automat- ically incremented after each byte ...

Page 13

... Devices are shipped from the factory with the memory content set at all "1’s" (FFh). For a list of available options (Operating Voltage, Package, etc...) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you. to you. ST24C08 M Range ...

Page 14

ST24/25C08, ST24/25W08 PSDIP8 - 8 pin Plastic Skinny DIP, 0.25mm lead frame Symb Typ 7. 2. Drawing is not to scale 14/16 mm ...

Page 15

SO8 - 8 lead Plastic Small Outline, 150 mils body width Symb Typ 1. SO-a Drawing is not to scale mm Min Max ...

Page 16

... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics ...

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