74LS221 ON Semiconductor, 74LS221 Datasheet

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74LS221

Manufacturer Part Number
74LS221
Description
LOW POWER SCHOTTKY
Manufacturer
ON Semiconductor
Datasheet

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SN74LS221
Dual Monostable
Multivibrators with
Schmitt-Trigger Inputs
triggered input and a positive-transition-triggered input either of
which can be used as an inhibit input.
transition time of the input pulse. Schmitt-trigger input circuitry for B
input allows jitter-free triggering for inputs as slow as 1 volt / second,
providing the circuit with excellent noise immunity. A high immunity
to V
the inputs and are a function of the timing components. The output
pulses can be terminated by the overriding clear. Input pulse width
may be of any duration relative to the output pulse width. Output pulse
width may be varied from 35 nanoseconds to a maximum of 70 s by
choosing appropriate timing components. With R
= 0, a typical output pulse of 30 nanoseconds is achieved. Output rise
and fall times are independent of pulse length.
is virtually independent of V
pulse stability will only be limited by the accuracy of external timing
components.
ranges for greater than six decades of timing capacitance (10 pF to 10
for the SN74LS221). Pulse width is defined by the relationship:
t
pF and R
1000 F and resistance as low as 1.4 k
jitter-free pulse widths is extended if V
temperature.
GUARANTEED OPERATING RANGES
w
December, 1999 – Rev. 6
F), and greater than one decade of timing resistance (2.0 to 100 k
Symbol
Each multivibrator of the LS221 features a negative-transition-
Pulse triggering occurs at a voltage level and is not related to the
Once triggered, the outputs are independent of further transitions of
Pulse width stability is achieved through internal compensation and
Jitter-free operation is maintained over the full temperature and V
(out) = C
SN74LS221 is a Dual Highly Stable One-Shot
Overriding Clear Terminates Output Pulse
Pin Out is Identical to SN74LS123
Semiconductor Components Industries, LLC, 1999
V
I
I
T
OH
CC
OL
CC
A
noise is also provided by internal latching circuitry.
ext
ext
Supply Voltage
Operating Ambient
Output Current – High
Output Current – Low
is in k . If pulse cutoff is not critical, capacitance up to
R
Temperature Range
ext
ln 2.0
Parameter
0.7 C
CC
and temperature. In most applications,
ext
R
ext
4.75
Min
; where t
0
may be used. The range of
CC
Typ
5.0
25
is 5.0 V and 25 C
W
ext
is in ns if C
= 2.0 k and C
Max
5.25
– 0.4
8.0
70
1
ext
Unit
mA
mA
V
C
is in
CC
ext
SN74LS221N
SN74LS221D
Device
ORDERING INFORMATION
16
http://onsemi.com
SCHOTTKY
16
1
16 Pin DIP
POWER
CASE 751B
Package
CASE 648
N SUFFIX
D SUFFIX
PLASTIC
16 Pin
LOW
SOIC
Publication Order Number:
1
2500/Tape & Reel
2000 Units/Box
SN74LS221/D
Shipping

Related parts for 74LS221

74LS221 Summary of contents

Page 1

... Jitter-free operation is maintained over the full temperature and V ranges for greater than six decades of timing capacitance ( F), and greater than one decade of timing resistance (2.0 to 100 k for the SN74LS221). Pulse width is defined by the relationship: t (out 2.0 ...

Page 2

... Positive logic: Q high regardless of dc levels at A Positive logic inputs ext + C R/C ext FUNCTION TABLE (EACH MONOSTABLE) INPUTS OUTPUTS CLEAR ° ± ° *See operational notes — Pulse Trigger Modes TYPICAL MAXIMUM TYPE POWER OUTPUT PULSE DISSIPATION LENGTH SN74LS221 http://onsemi.com ...

Page 3

... This is not the case for the LS221. Also note that it is recommended to externally ground the LS123 C However, this cannot be done on the LS221. The SN74LS221 is a dual, monolithic, non-retriggerable, high-stability one shot. The output pulse width, t varied over 9 decades of timing by proper selection of the ...

Page 4

... I IL Input B Clear I Short Circuit Current (Note 1) OS Power Supply Current Quiescent Triggered Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. SN74LS221 (unless otherwise specified) Limits Min Typ Max Unit 1.0 2 MIN CC 0.7 0.8 ...

Page 5

... W(out SETUP REQUIREMENTS ( Symbol Parameter Rate of Rise or Fall of Input Pulse dv/dt Input Pulse Width Clear-Inactive-State Setup Time s R External Timing Resistance ext C External Timing Capacitance ext Output Duty Cycle SN74LS221 = 25 C) Limits Min Typ Max Unit See Figure 120 150 ...

Page 6

... SN74LS221 AC WAVEFORMS t W(in) B INPUT 1 CLEAR t t PLH PHL Q OUTPUT t t PHL PLH Q OUTPUT A INPUT IS LOW. TRIGGER FROM B, THEN CLEAR — CONDITION 1 B INPUT 60 ns 1.3 V CLEAR Q OUTPUT A INPUT IS LOW. TRIGGER FROM B, THEN CLEAR — CONDITION 2 B INPUT 50 ns CLEAR TRIGGERED Q OUTPUT NOT TRIGGERED A INPUT IS LOW ...

Page 7

... 0.25 (0.010) M –A– –B– –T– SEATING PLANE 0.25 (0.010 SN74LS221 PACKAGE DIMENSIONS N SUFFIX PLASTIC PACKAGE CASE 648–08 ISSUE R L SEATING –T– PLANE SUFFIX PLASTIC SOIC PACKAGE CASE 751B–05 ISSUE 0.25 (0.010 http://onsemi.com ...

Page 8

... Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–8549 Phone: 81–3–5487–8345 Email: r14153@onsemi.com Fax Response Line: 303–675–2167 800–344–3810 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 8 SN74LS221/D ...

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