54LS14 Fairchild Semiconductor, 54LS14 Datasheet
54LS14
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54LS14 Summary of contents
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... Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74LS14N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 2000 Fairchild Semiconductor Corporation Package Description Function Table Y Input A ...
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Absolute Maximum Ratings Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V Positive-Going Input Threshold Voltage (Note Negative-Going Input Threshold Voltage (Note 2) T ...
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Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow Package Number M14A 3 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M14D 4 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...