MT8940AC Mitel, MT8940AC Datasheet

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MT8940AC

Manufacturer Part Number
MT8940AC
Description
0.3-7.0V; 10mA; subscriber network interface cicuit. For synchronization and timing control for T1 and CEPT digital trunk transmission links, ST-BUS clock and frame pulse source
Manufacturer
Mitel
Datasheet

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Features
Applications
C8Kb
Provides T1 clock at 1.544 MHz locked to input
frame pulse
Sources CEPT (30+2) Digital Trunk/ST-BUS
clock and timing signals locked to internal or
external 8 kHz signal
TTL compatible logic inputs and outputs
Uncommitted 2-input NAND gate
Single 5 volt power supply
Low power ISO-CMOS technology
Synchronization and timing control for T1
and CEPT digital trunk transmission links
ST- BUS clock and frame pulse source
C12i
MS0
MS1
MS2
MS3
C16i
F0i
Ai
Bi
DPLL #2
Selection
DPLL #1
Mode
Logic
Yo
Figure 1 - Functional Block Diagram
V
DD
ISO-CMOS ST-BUS
Generator
Selector
2:1 MUX
Clock
Input
Description
The MT8940 is a dual digital phase-locked loop
providing the timing and synchronization signals for
the T1 or CEPT transmission links and the ST-BUS.
The first PLL provides the T1 clock (1.544 MHz)
synchronized to the input frame pulse at 8 kHz. The
timing signals for the CEPT transmission link and the
ST-BUS are provided by the second PLL locked to an
internal or an external 8 kHz frame pulse signal.
The MT8940 is fabricated in MITEL’s ISO-CMOS
technology.
V
SS
MT8940AE
T1/CEPT Digital Trunk PLL
Ordering Information
RST
-40 C to +85 C
Frame Pulse
4.096 MHz
24 Pin Plastic DIP (600 mil)
2.048 MHz
FAMILY
ISSUE 8
Control
Control
Variable
Control
Control
Clock
Clock
Clock
MT8940
March 1997
CVb
CV
ENCV
F0b
C4b
C4o
ENC4o
C2o
C2o
ENC2o
3-27
27

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MT8940AC Summary of contents

Page 1

... The timing signals for the CEPT transmission link and the ST-BUS are provided by the second PLL locked to an internal or an external 8 kHz frame pulse signal. The MT8940 is fabricated in MITEL’s ISO-CMOS technology. 2:1 MUX Input ...

Page 2

MT8940 ISO-CMOS Pin Description Pin # Name 1 EN Variable clock enable (TTL compatible input) - This input (pulled internally controls the three states of CV (pin 22) under all modes of operation. When HIGH, enables CV ...

Page 3

Pin Description (continued) Pin # Name 10 C8Kb Clock 8 kHz- Bidirectional (TTL compatible input and open drain output with 100K internal resistor to V locks during its NORMAL mode. When DPLL # SINGLE CLOCK mode, this pin ...

Page 4

... DPLL #2 provides the CEPT PCM 30 timing, and the ST-BUS clock and framing signals. In NORMAL mode, DPLL #2 provides the CEPT and ST-BUS compatible timing signals locked to the rising edge of the 8 kHz input signal (C8Kb). These applications involving MITEL’s (T1 interfaces) and ...

Page 5

MHz (C4o and C4b) and the 2.048 MHz (C2o and C2o) clocks, and the 8 kHz Mode of MS0 MS1 operation X 0 NORMAL Provides the T1 (1.544 MHz) clock synchronized to the falling edge of ...

Page 6

MT8940 ISO-CMOS F0b (refer to Figure 15). Otherwise, the input on pin F0b will have no bearing on the operation of DPLL #2, unless FREE-RUN mode as selected by MS0 and MS1. In FREE-RUN mode, the input ...

Page 7

... Applications The following figures illustrate how the MT8940 can be used in a minimum component count approach to providing the timing and synchronization signals for the Mitel T1 and CEPT interfaces, and the ST-BUS. The hardware selectable modes independent control over each PLL adds flexibility to the interface circuits. It can be easily reconfi ...

Page 8

MT8940 ISO-CMOS Crystal Clock (12.355 MHz 100 ppm) MS0 MS1 MS2 MS3 F0i C12i EN CV C8Kb C16i EN C4o EN C2o Crystal Clock SS (16.388 MHz 32 ppm) Figure 5 - Synchronization at the Slave End ...

Page 9

MT8940 MS0 MS1 MS2 MS3 F0i C12i EN CV C8Kb Crystal Clock C16i (16.388 MHz 32 ppm) EN C4o EN C2o Figure 7 - Synchronization at the Slave End of the CEPT Digital Transmission Link MT8940 ...

Page 10

MT8940 ISO-CMOS Absolute Maximum Ratings* Parameter 1 Supply Voltage 2 Voltage on any pin 3 Input/Output Diode Current 4 Output Source or Sink Current 5 DC Supply or Ground Current 6 Storage Temperature 7 Package Power Dissipation * Exceeding these ...

Page 11

AC Electrical Characteristics Characteristics 1 Frame pulse input (F0i) to CVb output (1.544 MHz) delay 2 CVb output (1.544 MHz) rise time 3 CVb output (1.544 MHz) fall D time P 4 CVb output (1.544 MHz) clock L period L ...

Page 12

MT8940 ISO-CMOS V IH CVb C8Kb F0b FPL V OH C4b C4o 42LH t 42HL V ...

Page 13

AC Electrical Characteristics Characteristics 1 C4b output delay (HIGH to LOW) from C8Kb input/output 2 C4b output clock period 3 C4b output clock width (HIGH) 4 C4b output clock width (LOW) 5 C4b output clock rise time 6 C4b clock ...

Page 14

MT8940 ISO-CMOS AC Electrical Characteristics Characteristics 1 CV/CVb (1.544 MHz) Setup time 2 CV/CVb (1.544 MHz) Hold time † Timing is over recommended temperature & power supply voltages. ‡ Typical figures are and are for design aid ...

Page 15

AC Electrical Characteristics Characteristics 1 F0b input pulse width (LOW) 2 C4b input clock period 3 Frame pulse (F0b) setup time 4 Frame pulse (F0b) hold time † Timing is over recommended temperature & power supply voltages ‡ Typical figures ...

Page 16

MT8940 ISO-CMOS AC Electrical Characteristics Voltages are with respect to ground (V ) unless otherwise stated. SS Characteristics 1 Propagation delay (LOW to HIGH), input output 2 Propagation delay (HIGH to LOW), input ...

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