ISPGDS14 Lattice Semiconductor Corp., ISPGDS14 Datasheet

ISPGDS14

Manufacturer Part Number

ISPGDS14

Description

Manufacturer

Lattice Semiconductor Corp.

Datasheet

1.ISPGDS14.pdf (8 pages)

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• HIGH-SPEED SWITCH MATRIX

• FLEXIBLE I/O MACROCELL

• IN-SYSTEM PROGRAMMABLE (5-VOLT ONLY)

• E

• APPLICATIONS INCLUDE:

• ELECTRONIC SIGNATURE FOR IDENTIFICATION

The Lattice Semiconductor ispGDS™ family is an ideal solution

for reconfiguring system signal routing or replacing DIP switches

used for feature selection. With today’s demands for customer

ease of use, there is a need for hardware which is easily

reconfigured electronically without dismantling the system. The

ispGDS devices address this challenge by replacing conventional

switches with a software configurable solution. Since each I/O pin

can be set to an independent logic level, the ispGDS devices can

replace most DIP switch functions with about half the pin count,

and without the need for additional pull-up resistors. In addition

to DIP switch replacement, the ispGDS devices are useful as

signal routing cross-matrix switches. This is the only non-volatile

device on the market which can provide this flexibility.

With a maximum tpd of 7.5ns, and a typical active Icc of only 25

mA, these devices provide maximum performance at very low

power levels. The ispGDS devices may be programmed in-sys-

tem, using 5 volt only signals, through a simple 4-wire program-

ming interface. The ispGDS devices are manufactured using

to change without notice.

LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.

Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268--8037; http://www.latticesemi.com

ispgds_02

Features

Description

— 7.5 ns Maximum Propagation Delay

— Typical Icc = 25 mA

— UltraMOS

— Any I/O Pin Can be Input, Output, or Fixed

— Programmable Output Polarity

— Multiple Outputs Can be Driven by One Input

— Programming Time of Less Than One Second

— 4-Wire Programming Interface

— Minimum 10,000 Program/Erase Cycles

— Non-Volatile Reprogrammable Cells

— 100% Tested/100% Yields

— High Speed Electrical Erasure (<100ms)

— 20 Year Data Retention

— Software-Driven Hardware Configuration

— Multiple DIP Switch Replacement

— Software Configuration of Add-In Boards

— Configurable Addressing of I/O Boards

— Multiple Clock Source Selection

— Cross-Matrix Switch

CELL TECHNOLOGY

TTL High or Low

Advanced CMOS Technology

Lattice Semiconductor’s advanced non-volatile E

which combines CMOS with Electrically Erasable (E

technology. High speed erase times (<100ms) allow the devices

to be reprogrammed quickly and efficiently.

Each I/O macrocell can be configured as an input, an inverting

or non-inverting output, or a fixed TTL high or low output. Any

I/O pin can be driven by any other I/O pin in the opposite bank.

A single input can drive one or more outputs in the opposite bank,

allowing a signal (such as a clock) to be distributed to multiple des-

tinations on the board, under software control. The I/Os accept

and drive TTL voltage levels.

Unique test circuitry and reprogrammable cells allow complete

AC, DC, and functional testing during manufacture. As a result,

Lattice Semiconductor is able to deliver 100% field programma-

bility and functionality of all Lattice Semiconductor products. In

addition, 10,000 erase/write cycles and data retention in excess

of 20 years are specified.

Functional Block Diagram (ispGDS22)

A10

I/O Cell

Switch

Matrix

I/O Cell

ispGDS22/18/14

Closed only when C0=1 and C1=0

in-system programmable

Vcc

PROGRAMMABLE

Generic Digital Switch

SWITCH MATRIX

0 1

1 0

1 1

0 0

4:1 MUX

CMOS process

Bank B

) floating gate

July 1997

Related parts for ISPGDS14

ISPGDS14 Summary of contents

Page 1

... The ispGDS devices are manufactured using Copyright © 1997 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. ...

Page 2

... Part Number Description ispGDS22 Device Name ispGDS18 ispGDS14 Speed (ns) Isb (mA) Icc (mA) Ordering # ispGDS22- ispGDS22- ispGDS18-7P ispGDS14- ispGDS14-7J _ XXXXXXXX Specifications ispGDS Package 28-Pin Plastic DIP 28-Lead PLCC 24-Pin Plastic DIP 20-Pin Plastic DIP 20-Lead PLCC Grade Blank = Commercial Package P = Plastic DIP J = PLCC ...

Page 3

... B10 A10 28-Pin PLCC Vcc 7 ispGDS22 MODE 24-Pin DIP SDO SDI ispGDS Vcc B4 18 GND SCLK MODE SDI 25 SDO Vcc MODE GND Specifications ispGDS 20-Pin DIP SDO SDI ispGDS B3 5 Vcc 14 GND A3 15 SCLK MODE 20-Pin PLCC SDO ispGDS14 GND 14 SCLK ...

Page 4

... The numerical portion of the part name indicates the number of I/O cells available. All of the devices are available in a DIP package, with the ispGDS22 and ispGDS14 also available in a PLCC package. Each of the devices operate identically, with the only difference being the number of I/O cells available. ...

Page 5

I/O Macrocell Switch Matrix I/O Macrocell Configurations From Switch Matrix From Switch Matrix Vcc To Switch Matrix Note 1: The development software configures all of the architecture control bits and checks for proper pin usage automatically. Note 2: The default ...

Page 6

Absolute Maximum Ratings Supply voltage V ........................................ –.5 to +7V CC Input voltage applied .......................... –2 Off-state output voltage applied ......... –2 Storage Temperature ................................ –65 to 150 C Ambient Temperature with Power Applied ........................................... –55 ...

Page 7

AC Switching Characteristics TEST DESCRIPTION PARAMETER COND Input to Output Delay f max A Maximum Input Frequency Input Pulse Duration, High Input Pulse Duration, Low Switching Waveforms VALID INPUT INP UT ...

Page 8

Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.3 PT H->L 1.2 PT L->H 1.1 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 PT H->L 1.2 PT L->H 1.1 1 ...

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