CDP1857CE Intersil Corporation, CDP1857CE Datasheet

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CDP1857CE

Manufacturer Part Number
CDP1857CE
Description
4-Bit Bus Buffer/Separator
Manufacturer
Intersil Corporation
Datasheet
March 1997
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
Features
• Provides Easy Connection of I/O to CDP1800-Series
• Non-Inverting Fully Buffered Data Transfer
Ordering Information
Pinout
CDP1857CE
CDP1857CD
TABLE 1. CDP1857 FUNCTION FOR I/O BUS SEPARATOR
CS
Microprocessor Data Bus
0
1
1
NUMBER
PART
MRD
X
0
1
OPERATION
DO0
DO1
DO2
DO3
V
High Impedance
High Impedance
Data In
DI0
DI1
DI2
SS
TEMP. RANGE
-40
-40
DATA BUS OUT
o
o
1
2
3
4
5
6
7
8
C to +85
C to +85
DB0-DB3
16 LEAD DIP
TOP VIEW
|
o
o
C PDIP
C SBDIP
Copyright
PACKAGE
16
15
14
13
12
11
10
9
©
High Impedance
Data Bus
High Impedance
V
CS
DB0
DB1
DB2
DB3
MRD
DI3
Intersil Corporation 1999
DD
DATA OUT
DO0-DO3
PKG. NO.
E16.3
D16.3
4-62
Description
The CDP1857C is a 4-bit CMOS non-inverting bus separator
designed for use in CDP1800-series microprocessor systems. It can
be controlled directly by a 1800-series microprocessor without the
use of additional components.
The CDP1857 is designed for use as a bus buffer or separator
between the 1800-series microprocessor data bus and I/O devices.
It provides a chip-select (CS) input signal which, when high (1),
enables the bus-separator three-state output drivers. The direction
of data flow, when enabled, is controlled by the MRD input signal.
In the CDP1857, when MRD = 1, it enables the three-state bus drivers
(DB0-DB3) and transfers data from the DATA-IN lines onto the data
bus. When MRD = 0, it disables the three-state bus drivers (DB0-
DB3) and enables the three-state data output drivers (DO0-DO3),
thus, transferring data from the data bus to the DATA-OUT terminals.
The CDP1857 can be used as a bidirectional bus buffer by connecting
the corresponding DI and DO terminals (Figure 1). The MRD output
signal from the 1800-series microprocessor has the correct polarity to
control the CDP1857 when it is used as I/O bus buffer/separator.
Therefore, the 1800-series microprocessor MRD signal can be
connected directly to the MRD input of CDP1857. See Function Table
1 for use of the CDP1857 as an I/O bus buffer/separator.
The CDP1857C is supplied in 16-lead hermetic, dual-in-line ceramic
packages (D suffix), and in 16-lead plastic packages (E suffix).
Functional Diagram For CDP1857
MRD
DO0
DO1
DO2
DO3
DI0
DI1
DI2
DI3
10
1
3
2
4
7
5
9
6
CDP1857C
4-Bit Bus Buffer/Separator
File Number
16 = V
8 = V
DD
SS
14
13
12
11
15
1192.2
DB0
DB1
DB2
DB3
CS

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CDP1857CE Summary of contents

Page 1

... March 1997 Features • Provides Easy Connection of I/O to CDP1800-Series Microprocessor Data Bus • Non-Inverting Fully Buffered Data Transfer Ordering Information PART NUMBER TEMP. RANGE o o CDP1857CE - +85 C PDIP o o CDP1857CD - +85 C SBDIP TABLE 1. CDP1857 FUNCTION FOR I/O BUS SEPARATOR OPERATION DATA BUS OUT ...

Page 2

Absolute Maximum Ratings DC Supply Voltage Range (All Voltages Referenced to V Terminal -0.5V to +7V SS Input Voltage Range, All Inputs . . . . . . . ...

Page 3

Recommended Operating Conditions PARAMETER Supply-Voltage Range Recommended Input Voltage Range Timing Diagrams CS MRD FIGURE 1A. ENABLE TO DB TIME CS MRD VALID DATA FIGURE 1C TIME CDP1857C At ...

Page 4

... All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...

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