SAK-C167CS-LM

Manufacturer Part NumberSAK-C167CS-LM
Description16-Bit Single-Chip Microcontroller
ManufacturerInfineon Technologies AG
SAK-C167CS-LM datasheet
 
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Page 60/81:

Clock Generation Modes

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P0.15-13 (P0H.7-5). Register RP0H can be loaded from the upper half of register
RSTCON under software control.
Table 11
associates the combinations of these three bits with the respective clock
generation mode.
Table 11
C167CS Clock Generation Modes
CLKCFG
CPU Frequency
f
f
(RP0H.7-5)
=
CPU
OSC
× 4
f
1 1 1
OSC
× 3
f
1 1 0
OSC
× 2
f
1 0 1
OSC
× 5
f
1 0 0
OSC
× 1
f
0 1 1
OSC
× 1.5
f
0 1 0
OSC
f
0 0 1
/ 2
OSC
× 2.5
f
0 0 0
OSC
1)
The external clock input range refers to a CPU clock range of 10 … 40 MHz.
2)
The maximum frequency depends on the duty cycle of the external clock signal.
3)
In prescaler mode the full CPU clock range cannot be used.
Prescaler Operation
When prescaler operation is configured (CLKCFG = 001
the internal oscillator (input clock signal) by a 2:1 prescaler.
f
The frequency of
is half the frequency of
CPU
the duration of an individual TCL) is defined by the period of the input clock
The timings listed in the AC Characteristics that refer to TCLs therefore can be
calculated using the period of
Phase Locked Loop
When PLL operation is configured (via CLKCFG) the on-chip phase locked loop is
enabled and provides the CPU clock (see
frequency by the factor F which is selected via the combination of pins P0.15-13 (i.e.
× F). With every F’th transition of
f
f
=
CPU
OSC
clock to the input clock. This synchronization is done smoothly, i.e. the CPU clock
frequency does not change abruptly.
Data Sheet
External Clock
1)
× F
Input Range
2.5 to 10 MHz
3.33 to 13.33 MHz
5 to 20 MHz
2 to 8 MHz
1 to 40 MHz
6.66 to 26.66 MHz
3)
2 to 50 MHz
4 to 16 MHz
f
and the high and low time of
OSC
f
for any TCL.
OSC
Table
f
the PLL circuit synchronizes the CPU
OSC
56
C167CS-4R
C167CS-L
Notes
Default configuration
–
–
–
2)
Direct drive
–
CPU clock via prescaler
–
) the CPU clock is derived from
B
f
OSC
11). The PLL multiplies the input
V2.2, 2001-08
f
(i.e.
CPU
.

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