MC14076BCP ON Semiconductor, MC14076BCP Datasheet

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MC14076BCP

Manufacturer Part Number
MC14076BCP
Description
Manufacturer
ON Semiconductor
Datasheet

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MC14076B
4-Bit D-Type Register
with Three-State Outputs
operating synchronously from a common clock. OR gated
output–disable inputs force the outputs into a high–impedance state
for use in bus organized systems. OR gated data–disable inputs cause
the Q outputs to be fed back to the D inputs of the flip–flops. Thus they
are inhibited from changing state while the clocking process remains
undisturbed. An asynchronous master root is provided to clear all four
flip–flops simultaneously independent of the clock or disable inputs.
1. Maximum Ratings are those values beyond which damage to the device
2. Temperature Derating:
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high–impedance circuit. For proper operation, V
to the range V
either V
MAXIMUM RATINGS
March, 2000 – Rev. 3
Symbol
V
The MC14076B 4–Bit Register consists of four D–type flip–flops
I
This device contains protection circuitry to guard against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
Modes: Parallel Load and Do Nothing
Schottky TTL Load Over the Rated Temperature Range
Three–State Outputs with Gated Control Lines
Fully Independent Clock Allows Unrestricted Operation for the Two
Asynchronous Master Reset
Four Bus Buffer Registers
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–Power TTL Loads or One Low–Power
in
in
Semiconductor Components Industries, LLC, 2000
may occur.
Plastic “P and D/DW” Packages: – 7.0 mW/ _ C From 65 _ C To 125 _ C
V
T
P
, V
, I
T
T
stg
DD
D
A
L
out
out
SS
or V
DC Supply Voltage Range
Input or Output Voltage Range
Input or Output Current
Power Dissipation,
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
SS
DD
(DC or Transient)
(DC or Transient) per Pin
per Package (Note 2.)
(8–Second Soldering)
v
). Unused outputs must be left open.
(V
in
Parameter
or V
(Voltages Referenced to V
out
)
v
V
DD
.
in
and V
– 0.5 to V
– 0.5 to +18.0
SS
– 55 to +125
– 65 to +150
out
) (Note 1.)
Value
500
260
should be constrained
10
DD
+ 0.5
1
Unit
mW
mA
V
V
C
C
C
MC14076BCP
MC14076BD
MC14076BDR2
Device
ORDERING INFORMATION
A
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
http://onsemi.com
CASE 751B
CASE 648
P SUFFIX
D SUFFIX
SOIC–16
PDIP–16
= Assembly Location
Package
SOIC–16
SOIC–16
PDIP–16
Publication Order Number:
2500/Tape & Reel
16
16
1
1
MC14076BCP
DIAGRAMS
MARKING
AWLYYWW
AWLYWW
Shipping
2000/Box
2400/Box
MC14076B/D
14076B

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MC14076BCP Summary of contents

Page 1

... MC14076BDR2 – +125 C – +150 C 260 C and V should be constrained in out 1 http://onsemi.com MARKING DIAGRAMS 16 PDIP–16 MC14076BCP P SUFFIX AWLYYWW CASE 648 1 16 SOIC–16 14076B D SUFFIX AWLYWW CASE 751B Assembly Location Wafer Lot Year Work Week ORDERING INFORMATION Package Shipping PDIP– ...

Page 2

MC14076B PIN ASSIGNMENT OUTPUT DD DISABLE DATA DISABLE ...

Page 3

ELECTRICAL CHARACTERISTICS Î Î Î Î Î ...

Page 4

SWITCHING CHARACTERISTICS Î Î Î Î ...

Page 5

INPUT RISE AND FALL 20 ns 90% INPUT D 50% INFORMATION 10 50 PLH 90% Q OUTPUT 10 TLH THL RESET = 0 DATA DISABLE ...

Page 6

PACKAGE DIMENSIONS PLASTIC DIP PACKAGE –A– SEATING –T– PLANE 0.25 (0.010 MC14076B PDIP–16 P SUFFIX NOTES: CASE 648–08 1. DIMENSIONING AND TOLERANCING PER ...

Page 7

G K –T– SEATING PLANE 0.25 (0.010 MC14076B PACKAGE DIMENSIONS SOIC–16 D SUFFIX PLASTIC SOIC PACKAGE CASE 751B–05 ISSUE 0.25 (0.010 ...

Page 8

... CENTRAL/SOUTH AMERICA: Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST) Email: ONlit–spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor – Asia Support Phone: 303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001–800–4422–3781 Email: ONlit– ...

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