EM78P153SP ELAN Microelectronics Corp, EM78P153SP Datasheet

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EM78P153SP

Manufacturer Part Number
EM78P153SP
Description
V(in/out): -0.3 to +6.0V 8-bit microcontroller
Manufacturer
ELAN Microelectronics Corp
Datasheet

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1. GENERAL DESCRIPTION
This specification is subject to change without prior notice.
EM78P153S is an 8-bit microprocessor with low-power and high-speed CMOS technology. It is equipped
with a 1024*13-bits Electrical One Time Programmable Read Only Memory (OTP-ROM) within it. It
provides a PROTECTION bit to prevent intrusion of user’s code in the OTP memory as well as 15
OPTION bits to match user’s requirements.
With its OTP-ROM feature, the EM78P153S offers users a convenient way of developing and verifying
their programs. Moreover, user developed code can be easily programmed with the ELAN writer.
1
EM78P153S
05.02.2003 (V1.2)
OTP ROM

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EM78P153SP Summary of contents

Page 1

GENERAL DESCRIPTION EM78P153S is an 8-bit microprocessor with low-power and high-speed CMOS technology equipped with a 1024*13-bits Electrical One Time Programmable Read Only Memory (OTP-ROM) within it. It provides a PROTECTION bit to prevent intrusion of user’s ...

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... I/O pins • 7 programmable open-drain I/O pins • 6 programmable pull-down I/O pins • Two clocks per instruction cycle • Package type: 14 pins SOP, DIP * 14 pin DIP 300mil: EM78P153SP This specification is subject to change without prior notice. 2 EM78P153S OTP ROM ...

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SOP 150mil: EM78P153SN • The transient point of system frequency between HXT and LXT is around 400KHz. This specification is subject to change without prior notice. 3 EM78P153S OTP ROM 05.02.2003 (V1.2) ...

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PIN ASSIGNMENTS Table ...

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P50~P53 1,14~13 I/O P53 12 I/O * General purpose I/O pin. VSS 11 - This specification is subject to change without prior notice. * Pull-high/open-drain. * Wake up from sleep mode when the status of the pin changes. * General ...

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FUNCTION DESCRIPTION OSCO OSCI /RESET WDT timer Oscillator/Timing Control Prescaler Built-in RAM OSC R3 4.1 Operational Registers 1. R0 (Indirect Addressing Register not a physically implemented register. Its major function indirect addressing pointer. ...

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Depending on the device type, R2 and hardware stack are 10-bit wide. The structure is depicted in Fig.3. •1024×13 bits on-chip OTP ROM addresses to the relative programming instruction codes. One program page is 1024 words long. • R2 ...

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1 2 3(S tatus 4 5(P ort5 6(P ort6 ...

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R3 (Status Register RST GP1 • Bit 0 (C) Carry flag • Bit 1 (DC) Auxiliary carry flag • Bit 2 (Z) Zero flag. Set to "1" if the result of an arithmetic or logic operation is ...

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Bits Not used. • RF can be cleared by instruction but cannot be set. • IOCF is the interrupt mask register. • Note that the result of reading RF is the "logic AND" and ...

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Bit 7 Not used. • CONT register is both readable and writable. 3. IOC5 ~ IOC6 (I/O Port Control Register) • "1" put the relative I/O pin into high impedance, while "0" defines the relative I/O pin as output. ...

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IOCD (Pull-high Control Register /PH7 /PH6 • Bit 0 (/PH0) Control bit used to enable the pull-high of P60 pin. 0: Enable internal pull-high 1: Disable internal pull-high • Bit 1 (/PH1) Control bit is used to ...

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Bit 1 (ICIE) ICIF interrupt enable bit. 0: disable ICIF interrupt 1: enable ICIF interrupt • Bit 2 (EXIE) EXIF interrupt enable bit. 0: disable EXIF interrupt 1: enable EXIF interrupt • Bits 3~7 Not used. • Individual interrupt ...

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I/O Ports The I/O registers, both Port 5 and Port 6, are bi-directional tri-state I/O ports. Port 6 can be pulled-high internally by software except P63. In addition, Port 6 can also have open-drain output by software except P63. ...

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PORT Fig. 6 The circuit of I/O port and I/O control register for Port 5 P60 /INT PORT Bit 6 of IOCE CLK *Pull-high (down), Open-drain are not shown in the figure. ...

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P61~P67 PORT *Pull-high (down), Open-drain are not shown in the figure. Fig. 8 The circuit of I/O port and I/O control register for P61~P67 IOCE CLK C L T10 T11 T17 /SLEP Fig. 9 Block diagram of ...

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Table 2 Usage of Port 6 input change wake-up/interrupt function (I) Wake-up from Port 6 Input Status Change (a) Before SLEEP 1. Disable WDT 2. Read I/O Port 6 (MOV R6,R6) 3. Execute "ENI" or "DISI" 4. Enable interrupt (Set ...

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The sleep (power down) mode is attained by executing the “SLEP” instruction. While entering sleep mode, WDT (if enabled) is cleared but keeps on running. The controller can be awakened by (1) External reset input on /RESET pin, (2) WDT ...

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Table 3 The Summary of the Initialized Register Values Address Name N/A IOC5 Wake-Up from Pin Change N/A IOC6 Wake-Up from Pin Change 0x05 P5 Wake-Up from Pin Change 0x06 P6 Wake-Up from Pin Change N/A CONT Wake-Up from Pin ...

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Address Name Wake-Up from Pin Change 0x0C IOCC Wake-Up from Pin Change 0x0D IOCD Wake-Up from Pin Change 0x0E IOCE Wake-Up from Pin Change 0x0F IOCF Wake-Up from Pin Change 0x10~0x2F R10~R2F Wake-Up from Pin Change X: not used. U: ...

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Table 4 The Values of RST, T and P after RESET Reset Type Power on /RESET during Operating mode /RESET wake-up during SLEEP mode WDT during Operating mode WDT wake-up during SLEEP mode Wake-Up on pin change during SLEEP mode ...

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Interrupt The EM78P153S has three falling-edge interrupts as listed below: (1) TCC overflow interrupt (2) Port 6 Input Status Change Interrupt (3) External interrupt [(P60, /INT) pin]. Before the Port 6 Input Status Changed Interrupt is enabled, reading Port ...

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VCC /IRQn CLK /RESET 4.7 Oscillator 1. Oscillator Modes The EM78P153S can be operated in four different oscillator modes, such as Internal RC oscillator mode (IRC), External RC oscillator mode(ERC), High ...

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Table 7 The summary of maximum operating speeds Conditions Two cycles with two clocks 2. Crystal Oscillator/Ceramic Resonators(XTAL) EM78P153S can be driven by an external clock signal through the OSCI pin as shown in Fig. 12. EM78P153S In most applications, ...

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Table 8 Capacitor Selection Guide for Crystal Oscillator or Ceramic Resonators Oscillator Type Ceramic Resonators Crystal Oscillator OSCI EM78P153S EM78P153S This specification is subject to change without prior notice. Frequency Mode Frequency 455 kHz HXT 2.0 MHz 4.0 MHz 32.768kHz ...

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External RC Oscillator Mode For some applications that do not need to have its timing to be calculated precisely, the RC oscillator (Fig. 16) offers a lot of cost savings. Nevertheless, it should be noted that the frequency of ...

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Table 9 RC Oscillator Frequencies Cext Rext 3.3k 5. 10k 100k 3.3k 5.1k 100 pF 10k 100k 3.3k 5.1k 300 pF 10k 100k <Note> 1. Measured on DIP packages. 2. Design reference only 4. Internal RC Oscillator Mode ...

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Code Option Register (Word 0) Bit12 Bit11 Bit10 /RESET /ENWDT CLKS • Bit 12 (/RESET): Define pin7 as a reset pin. 0: /RESET enable 1: /RESET disable • Bit 11 (/ENWTD): Watchdog timer enable bit. 0: Enable ...

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Bit 3 (RCOUT): A selecting bit of Oscillator output or I/O port. RCOUT 0 1 • Bit 2, Bit 1, and Bit 0 ( C2, C1 Calibrator of internal RC mode Bit 3 C2,C1,C0 ...

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External Power 0n Reset Circuit The circuit shown in Fig 17 implements an external RC to produce the reset pulse. The pulse width (time constant) should be kept long enough for Vdd to reach minimum operation voltage. This circuit ...

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EM78P153S 4.13 Instruction Set Each instruction in the instruction set is a 13-bit word divided into an OP code and one or more operands. Normally, all ...

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If for some reasons, the specification of the instruction cycle is not suitable for certain applications, try modifying the instruction as follows: (A) Modify one instruction cycle to consist of 4 oscillator periods. (B) Execute within two instruction cycles the ...

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0 0010 01rr rrrr 02rr 0 0010 10rr rrrr 02rr 0 0010 11rr rrrr 02rr 0 0011 00rr rrrr 03rr 0 0011 01rr rrrr 03rr 0 0011 10rr rrrr 03rr 0 0011 11rr rrrr 03rr 0 0100 00rr rrrr 04rr ...

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Timing Diagrams AC Test Input/Output W aveform 2.4 0.4 AC Testing : Input is driven at 2.4V for logic "1",and 0.4V for logic "0".Timing m easurements are made at 2.0V for logic "1",and 0.8V for logic "0". RESET Timing ...

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ABSOLUTE MAXIMUNM RATINGS Items Temperature under bias Storage temperature Input voltage Output voltage This specification is subject to change without prior notice. Rating 0°C to 70°C -65°C to 150°C -0.3V to +6.0V -0.3V to +6.0V 35 EM78P153S OTP ROM ...

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ELECTRICAL CHARACTERISTIC 6.1 DC Electrical Characteristic ( Ta= 0° °C, VDD= 5.0V±5%, VSS Symbol Parameter Fxt XTAL: VDD to 2.3V Fxt XTAL: VDD to 3V Fxt XTAL: VDD to 5V ERC RC: VDD to 5V ...

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AC Electrical Characteristic (Ta=0° °C, VDD=5V±5%, VSS=0V) Symbol Parameter Dclk Input CLK duty cycle Instruction cycle time Tins (CLKS="0") Ttcc TCC input period Tdrh Device reset hold time Trst /RESET pulse width Twdt1* Watchdog timer period Twdt2* ...

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... Appendix Package Types: OTP MCU EM78P153SP EM78P153SN This specification is subject to change without prior notice. Package Type Pin Count DIP SOP 38 EM78P153S OTP ROM Package Size 14 300 mil 14 150 mil 05.02.2003 (V1.2) ...

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