HEF40163BD Philips Semiconductors, HEF40163BD Datasheet
HEF40163BD
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HEF40163BD Summary of contents
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DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF40163B MSI 4-bit synchronous binary counter with synchronous reset Product specification File ...
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... Philips Semiconductors 4-bit synchronous binary counter with synchronous reset DESCRIPTION The HEF40163B is a fully synchronous edge-triggered 4-bit binary counter with a clock input (CP), four synchronous parallel data inputs (P synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP), count enable trickle (CET) ...
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Acrobat reader. white to force landscape pages to be ... Fig.2 Logic diagram. ...
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... Philips Semiconductors 4-bit synchronous binary counter with synchronous reset Fig.3 Pinning diagram. HEF40163BP(N): 16-lead DIL; plastic (SOT38-1) HEF40163BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF40163BT(D): 16-lead SO; plastic (SOT109- Package Designator North America SYNCHRONOUS MODE SELECTION SR PE CEP CET Notes HIGH state (the more positive voltage) 2 ...
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... Philips Semiconductors 4-bit synchronous binary counter with synchronous reset AC CHARACTERISTICS input transition times SS amb V V Dynamic power dissipation per 10 package ( CHARACTERISTICS pF; input transition times SS amb Propagation delays HIGH to LOW 10 15 LOW to HIGH HIGH to LOW 10 15 LOW to HIGH 10 15 CET TC HIGH to LOW ...
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... Philips Semiconductors 4-bit synchronous binary counter with synchronous reset AC CHARACTERISTICS pF; input transition times SS amb Minimum clock pulse width; LOW 10 15 Set-up times CEP, CET Hold times CEP, CET Maximum clock pulse frequency 10 15 January 1995 SYMBOL MIN. 5 100 t 40 WCPL 30 5 110 ...
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... Philips Semiconductors 4-bit synchronous binary counter with synchronous reset Conditions PE = LOW HIGH 0 3 Fig.5 Waveforms showing set-up and hold times for SR input and minimum CP pulse width. Condition HIGH. Fig.6 Waveforms showing set-up times and hold times for CEP and CET inputs. ...
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... Philips Semiconductors 4-bit synchronous binary counter with synchronous reset Conditions PE = LOW SR = HIGH Fig.7 Waveforms showing set-up times and hold times for P Condition SR = HIGH Fig.8 Waveforms showing set-up times and hold times for PE input. Note Set-up and hold times are shown as positive values but may be specified as negative values. ...
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... Philips Semiconductors 4-bit synchronous binary counter with synchronous reset APPLICATION INFORMATION An example of an application for the HEF40163B is: Programmable binary counter. January 1995 Fig.9 Timing diagram. 9 Product specification HEF40163B MSI ...
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... Philips Semiconductors 4-bit synchronous binary counter with synchronous reset NOTE On the TC outputs, glitches can occur during counting. In totally synchronous mode they will not have any adverse affect. However the TC output in asynchronous mode can cause problems. January 1995 Fig.10 Synchronous multi-stage counting scheme. ...