MT88E45BS Zarlink Semiconductor, MT88E45BS Datasheet

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MT88E45BS

Manufacturer Part Number
MT88E45BS
Description
MT88E45BS4-Wire Calling Number Identification Circuit 2 (4-Wire CNIC2)
Manufacturer
Zarlink Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT88E45BS
Manufacturer:
MITEL
Quantity:
20 000
Features
Compatible with:
Bellcore ‘CPE Alerting Signal’ (CAS), ETSI ‘Dual
Tone Alerting Signal’ (DT-AS), BT Idle State and
Loop State ‘Tone Alert Signal’ detection
1200 baud Bell 202 and CCITT V.23 FSK
demodulation
Separate differential input amplifiers with
adjustable gain for Tip/Ring and telephone hybrid
or speech IC connections
Selectable 3-wire FSK data interface (bit stream
or 1 byte buffer)
Facility to monitor the stop bit for framing error
check
FSK Carrier detect status output
3 to 5V +/- 10% supply voltage
Uses 3.579545 MHz crystal or ceramic resonator
Low power CMOS with power down
Bellcore GR-30-CORE, SR-TSV-002476,
ANSI/TIA/EIA-716, TIA/EIA-777;
ETSI ETS 300 778-1 (FSK only variant) & -2;
BT (British Telecom) SIN227 & SIN242
IN1+
IN1-
GS1
IN2+
IN2-
GS2
V
REF
OSC1
+
+
-
-
Bias
Generator
Oscillator
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
FSKen+Tip/Ring CASen
PWDN
PWDN
PWDN
OSC2
Hybrid CASen
MODE
Copyright 2001-2006, Zarlink Semiconductor Inc. All Rights Reserved.
FSKen
CB0
Anti-Alias
Filter
Control Bit
Decode
PWDN
CB1
Figure 1 - Functional Block Diagram
CASen
PWDN
CB2
Zarlink Semiconductor Inc.
FSK
Bandpass
2130Hz
Bandpass
2750Hz
Bandpass
FSKen
CASen
CASen
1
4-Wire Calling Number Identification
Applications
MT88E45BN
MT88E45BS
MT88E45BSR
MT88E45BNR
MT88E45BN1
MT88E45BNR1
MT88E45BS1
MT88E45BSR1
Bellcore CID (Calling Identity Delivery) and
CIDCW (Calling Identity Delivery on Call Waiting)
telephones and adjuncts
ETSI, BT CLIP (Calling Line Identity Presentation)
and CLIP with Call Waiting telephones and
adjuncts
Fax and answering machines
Computer Telephony Integration (CTI) systems
FSK
Demodulator
Tone
Detection
Algorithm
Carrier
Detector
Ordering Information
20 Pin SSOP
20 Pin SOIC
20 Pin SOIC
20 Pin SSOP
20 Pin SSOP*
20 Pin SSOP*
20 Pin SOIC*
20 Pin SOIC*
Circuit 2 (4-Wire CNIC2)
*Pb Free Matte Tin
-40°C to +85°C
Data Timing
Recovery
Guard
Time
MODE
STD
DR
Tubes
Tubes
Tape & Reel
Tape & Reel
Tubes
Tape & Reel,
Bake & Drypack
Tubes, Bake & Drypack
Tubes, Bake & Drypack
MT88E45
Data Sheet
DATA
DCLK
CD
DR/STD
ST/GT
EST
Vdd
Vss
June 2006

Related parts for MT88E45BS

MT88E45BS Summary of contents

Page 1

... Calling Number Identification MT88E45BN MT88E45BS MT88E45BSR MT88E45BNR MT88E45BN1 MT88E45BNR1 MT88E45BS1 MT88E45BSR1 Applications • Bellcore CID (Calling Identity Delivery) and CIDCW (Calling Identity Delivery on Call Waiting) telephones and adjuncts • ETSI, BT CLIP (Calling Line Identity Presentation) and CLIP with Call Waiting telephones and adjuncts • ...

Page 2

... Power management has been incorporated to power down the FSK or CAS section when not required. Full chip power down is also available. The MT88E45B is suitable for applications using a fixed power source (with a +/-10% variation) between 3 and 5 V. MT88E45 2 Zarlink Semiconductor Inc. Data Sheet ...

Page 3

... In mode 1 (when the CB0 pin is logic high) this is a Schmitt trigger input used to shift the FSK data byte out to the DATA pin. MT88E45 1 20 IN2+ V REF 2 MT88E45B 19 IN2- IN1 GS2 IN1 GS1 CB2 5 16 Vss CB1 6 15 Vdd OSC1 OSC2 ST/ CB0 9 12 EST DCLK DR/STD 10 11 DATA Figure 2 - Pin Connections Description 3 Zarlink Semiconductor Inc. Data Sheet ...

Page 4

... CB1 and CB2 pins. See Tables 1 and 2. 19 IN2- Hybrid Op-amp Inverting (Input). 20 IN2+ Hybrid Op-amp Non-Inverting (Input). MT88E45 Description at this pin causes the MT88E45B to indicate that a CAS has been TGt 4 Zarlink Semiconductor Inc. Data Sheet frees up the MT88E45B to TGt ...

Page 5

... The microcontroller uses CB1 and CB2 to select between the 3 functions. CB1 CB0 is hardwired to Vdd to select FSK interface mode 1. CB2 The microcontroller uses CB1 and CB2 to select between the 4 functions. CB0 All 3 pins are required. CB1 CB2 5 Zarlink Semiconductor Inc. Data Sheet Description ...

Page 6

... A problem arises in a CPE where the CAS detector is connected only to the hybrid or speech IC receive pair: it cannot detect CAS when it is on-hook. The reason is that when the CPE is on-hook either the hybrid/speech IC is non functional or the signal level is severely attenuated. Therefore an on-hook Type 2 CPE must be capable of MT88E45 6 Zarlink Semiconductor Inc. Data Sheet ...

Page 7

... Tip/Ring op-amp is selected, the GS2 signal is ignored. When the Hybrid op-amp is selected, the GS1 signal is ignored. Either or both op-amps can be configured in the single ended input configuration shown in Figure 33 the differential input configuration shown in Figure 44. MT88E45 7 Zarlink Semiconductor Inc. Data Sheet ). low REF REF ...

Page 8

... ETSI (Off-hook only) (Off-hook) +/-0.5% +/-0.5% d -14 to -32 dBm -9.78 to -32.78 dBm (-12 to -35 dBV -45 dBm +/-6 dB +/- Zarlink Semiconductor Inc. Data Sheet (Off-hook = ‘Loop State’) (On-hook = ‘Idle State’) Off-hook: +/-0.6% On-hook: +/-1.1% +0.22 to -37.78 dBm e ) (-2 to -40 dBV) On-hook: -43.78 dBm ...

Page 9

... Speech Speech -3.5 to -8.5 dB -3.5 to -8.5 dB Table 3 - CAS/DT-AS Characteristics . The purpose bridge over momentary EST dropouts once EST has GA 9 Zarlink Semiconductor Inc. Data Sheet (Off-hook = ‘Loop State’) (On-hook = ‘Idle State’) Off-hook On-hook 110 ms Off-hook: <=70 ms On-hook: <=20 ms Off-hook: Speech On-hook: > ...

Page 10

... MT88E45 MT88E45B VTGt Comparator Vss ABS t REC t GA has been reached (i.e. when ST/GT voltage is still below GP 10 Zarlink Semiconductor Inc. Data Sheet Vdd C ST/GT V diode R1 R2 Rp= EST / DR STD Indicates STD in CAS detection mode t =R1C ln [Vdd / (Vdd-VTGt =RpC ln Vdd - Vdiode (Rp/R2) ...

Page 11

... Single Tone (f): -18 dB (f<=60Hz) (300 to 3400 Hz) -12 dB (60<f<=120Hz (120<f<=200Hz) +25 dB (200<f<3200Hz (f>=3200Hz -3.5 dB Table 4 - FSK Signal Characteristics 11 Zarlink Semiconductor Inc. Data Sheet is the delay from the end of CAS to EST The total delay from the end of REC DP GP. b ...

Page 12

... The last bit must be shifted out and DCLK returned to low before the next DR. DCLK must be low for t before DR goes low and must remain low for t DDS MT88E45 after DR has gone low (see Figure 14). DDH 12 Zarlink Semiconductor Inc. Data Sheet ...

Page 13

... CAS detector is powered down. When CAS is selected the FSK demodulator is powered down. The two input op-amps are not affected and both will remain operational. MT88E45 , INT1 and the oscillator are non functional. DCLK becomes an input REF 13 Zarlink Semiconductor Inc. Data Sheet the or INT2 caused the interrupt by ...

Page 14

... For 5V+/-10% applications any number of MT88E45B’s can be connected as shown in Figure that only one crystal is required. MT88E45B OSC1 OSC2 3.579545 MHz MT88E45 MT88E45B MT88E45B OSC1 OSC2 OSC1 OSC2 next MT88E45B (For 5V+/-10% applications only) Figure 6 - Common Crystal Connection 14 Zarlink Semiconductor Inc. Data Sheet to the ...

Page 15

... R15 DATA DR/STD 2n2, 1332V min. 2n2, 212V min. C3,C4 2n2 C5 100n C6 100n, 20% D1-D4 Diodes. 1N4148 or equivalent D5 Diode. 1N4148 or equivalent Xtal 3.579545MHz, 0.1% crystal or ceramic resonator 15 Zarlink Semiconductor Inc. Data Sheet Tx+ Microphone Tx- Rx+ Speaker Rx- R11 R10 R8 C3 IN2 R12 Vdd Vdd CD ...

Page 16

... R7 Actual A from now Scaled for good common mode range. Choose the closest standard resistor value as R5 Calculate R6 so that R5 Av the closest standard resistor value Zarlink Semiconductor Inc. Data Sheet 0.794 Gain ratio for ETSI GS1 op amp 4.5 5 and R7 ...

Page 17

... Interrupt Source 2 INT2 (CMOS) MT88E45B DR/STD (CMOS) Figure 9 - Application Circuit: Multiple Interrupt Source MT88E45 -3.5/20 =10 = 0.668 v Vdd Vdd Resistor (R2) Resistor (R1 can be opened and D1 shorted if the microcontroller does not read the INT1 pin. 17 Zarlink Semiconductor Inc. Data Sheet Microcontroller INT(input) Input Port Bit ...

Page 18

... I 0.1 DDQ I DD 2.8 1 0.44*V 0.64 0.27*V 0.47 0.2 HYS V 0.7 0.3 0 Zarlink Semiconductor Inc. Data Sheet Min. Max. Units -0 -0 -65 150 o C -1V to maximum V +1V for an input current unless otherwise stated. ‡ Typ. Max. Units 5.5 V 3.579545 MHz +0.1 ...

Page 19

... Iin1 Iin2 Ioz1 V 0.5V -0.1 0.5V DD REF R REF V 0.5V - 0.5V TGt DD 0.05 ‡ Sym. Min. Typ. f 2130 L f 2750 H 1.1% 3.5% -40 -37. SNR 20 CAS 19 Zarlink Semiconductor Inc. Data Sheet Max. Units Test Conditions mA V =0.1 µ µ µ out Load DD 2 kΩ ...

Page 20

... OS PSRR 30 dB CMRR VOL f 0.3 MHz C -0 100 kΩ L -1 Zarlink Semiconductor Inc. Data Sheet Units Notes* dBV dBm mVrms dBm dBV mVrms baud 1,3 Test Conditions ≤ V ≤ 1kHz ripple ≤ V ≤ CMmin IN CMmax Load ≥ 100kΩ ...

Page 21

... CDD f 1201.6 1202.8 1204 DCLK0 t 415 416 417 CH t 415 416 417 CL t 415 416 417 CRD 21 Zarlink Semiconductor Inc. Data Sheet Notes See Figures16 16, 1717 See Figures16 16, 1717 Units Notes Units Notes* ns into 50 pF Load ns into 50 pF Load µs 2 baud 1 ...

Page 22

... Rise/Fall Threshold Voltage Low DATA DCLK Figure 10 - DATA and DCLK Mode 0 Output Timing DR MT88E45 Sym. f DCLK1 DDS t DDH Sym CDD DCD Figure Output Timing 22 Zarlink Semiconductor Inc. Data Sheet Min. Max. Units Notes 1 MHz 100 ns 500 ns 500 ns Level Units Notes 0.5 0.7 0.3 ...

Page 23

... Figure 12 - DCLK Mode 1 Input Timing start TIP/RING (A/B) WIRES stop t IDD start DATA (Output) stop DCLK (Output (Output) Figure 13 - 3-Wire FSK Data Interface Timing (Mode 0) MT88E45 t R1 start stop start stop CRD Zarlink Semiconductor Inc. Data Sheet start stop start stop 1/f DCLK0 ...

Page 24

... Note 1 >t 1/f DDH DCLK1 Word N Ch. seizure Data Mark ..101010.. Data e.g., CID 24 Zarlink Semiconductor Inc. Data Sheet stop t RL Note 2 stop 0 2nd Ring F Note 3 Note 2 Note 2sec typical B = 250-500ms C = 250ms D = 150ms E = feature specific Max C+D+E = 2.9 to 3.7sec F ≥ 200ms ...

Page 25

... GA V TGt t ABS t CP Note where t is the tone present guard time and where t is the tone absent guard time and Zarlink Semiconductor Inc. Data Sheet CPE unmutes handset and enables keypad Data Note 75- 0-100 55- 0-500 58- feature specific G ≤ Data is the tone present detect time the tone absent detect time ...

Page 26

... Current wetting pulse (see SIN227) Zss (Refer to SIN227 ..101010 where t is the tone present guard time and where t is the tone absent guard time and Zarlink Semiconductor Inc. Data Sheet Data Ring F G Note 4 50-150ms Note 4 Note ≥ 100 88-110 ms C ≥ (up to 5sec 80-262 45- ≤ ...

Page 27

... This signal represents the mode of the DR/STD pin. MT88E45 Mark Ch. seizure Data Note 2 50-150ms ..101010.. Data 27 Zarlink Semiconductor Inc. Data Sheet First Complete Ring Cycle 200-450 ms B ≥ 500 80-262 45-262 ms E ≤ 2.5s (typ. 500 ms) F >200 ms Note: Parameter F from "CCA Exceptions t PD ...

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Page 30

... For more information about all Zarlink products Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use ...

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