MC74HC109N Motorola, MC74HC109N Datasheet

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MC74HC109N

Manufacturer Part Number
MC74HC109N
Description
Dual J-K flip-flop with set and reset
Manufacturer
Motorola
Datasheet
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual J-K Flip-Flop with
Set and Reset
High–Performance Silicon–Gate CMOS
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
clock inputs. Changes at the inputs are reflected at the outputs with the next
low–to–high transition of the clock. Both Q and Q outputs are available from
each flip–flop.
10/95
Motorola, Inc. 1995
The MC74HC109 is identical in pinout to the LS109. The device inputs are
This device consists of two J–K flip–flops with individual set, reset, and
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 148 FETs or 37 Equivalent Gates
CLOCK 1
CLOCK 2
RESET 1
RESET 2
SET 1
SET 2
K1
K2
J2
J1
LOGIC DIAGRAM
13
12
14
15
11
5
3
4
2
1
PIN 16 = V CC
PIN 8 = GND
10
6
7
9
Q1
Q1
Q2
Q2
1
REV 6
* Both outputs will remain high as long as Set and
Set
Reset are low, but the output states are unpre-
dictable if Set and Reset go high simultaneously.
H
H
H
H
H
H
L
L
16
16
Reset Clock
MC74HC109
1
CLOCK 1
RESET 1
H
H
H
H
H
H
L
L
ORDERING INFORMATION
SET 1
MC74HCXXXN
MC74HCXXXD
1
GND
Q1
Q1
K1
J1
FUNCTION TABLE
PIN ASSIGNMENT
Inputs
X
X
X
L
1
2
3
4
5
6
7
8
X
X
X
H
H
X
J
L
L
PLASTIC PACKAGE
SOIC PACKAGE
CASE 751B–05
16
15
14
13
12
10
11
CASE 648–08
9
K
X
X
X
H
H
X
N SUFFIX
D SUFFIX
L
L
Plastic
SOIC
V CC
RESET 2
J2
K2
CLOCK 2
SET 2
Q2
Q2
No Change
No Change
H*
Outputs
Q
H
H
L
L
Toggle
H*
Q
H
H
L
L

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MC74HC109N Summary of contents

Page 1

... J1 1 RESET 1 11 SET CLOCK RESET 2 PIN PIN 8 = GND 10/95 Motorola, Inc. 1995 Set Both outputs will remain high as long as Set and Reset are low, but the output states are unpre- dictable if Set and Reset go high simultaneously. 1 REV 6 MC74HC109 N SUFFIX PLASTIC PACKAGE 16 CASE 648– ...

Page 2

... Current (per Package) Î Î Î Î Î Î Î Î Î Î Î Î Î NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). MOTOROLA Î Î Î Î Î Î Î Î Î ...

Page 3

... NOTES: 1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). 2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). ...

Page 4

... PLH t PHL 90% 50% 10 TLH t THL Figure 1. VALID 50 50% CLOCK Figure MOTOROLA SWITCHING WAVEFORMS SET OR 50% RESET GND 50% 50 CLOCK V CC GND DEVICE UNDER V CC TEST GND * Includes all probe and jig capacitance Figure 4. Test Circuit EXPANDED LOGIC DIAGRAM ...

Page 5

... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “ ...

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