MC74HC76N Motorola, MC74HC76N Datasheet

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MC74HC76N

Manufacturer Part Number
MC74HC76N
Description
Dual JK flip-flop with set and reset
Manufacturer
Motorola
Datasheet

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual JK Flip-Flop
With Set and Reset
High–Performance Silicon–Gate CMOS
are compatible with Standard CMOS outputs; with pullup resistors, they
are compatible with LSTTL outputs.
nous Set and Reset inputs.
pinout.
* Both outputs will remain low as long as Set and Reset are low, but the output states are
10/95
FUNCTION TABLE
unpredictable if Set and Reset go high simultaneously.
Motorola, Inc. 1995
Similar in Function to the LS76 Except When Set and Reset Are
Low Simultaneously
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 2 to 6V
Low Input Current: 1 A
High Noise Immunity Characteristic of CMOS Devices
In Compliance With the JEDEC Standard No. 7A Requirements
Chip Complexity: 100 FETs or 25 Equivalent Gates
The MC74HC76 is identical in pinout to the LS76. The device inputs
Each flip–flop is negative–edge clocked and has active–low asynchro-
The HC76 is identical in function to the HC112, but has a different
Set
H
H
H
H
H
H
H
H
L
L
Reset
H
H
H
H
H
H
H
H
L
L
Reset1
Reset2
Clock1
Clock2
Set1
Set2
K1
K2
J1
J2
2
16
1
4
3
7
12
6
9
8
Inputs
Clock
H
X
X
X
L
LOGIC DIAGRAM
X
X
X
H
H
X
X
X
J
L
L
PIN 5 = V CC
PIN 13 = GND
K
X
X
X
H
H
X
X
X
L
L
15
14
10
11
Q1
Q1
Q2
Q2
L*
Q
H
H
L
L
No Change
No Change
No Change
No Change
Outputs
Toggle
1
L*
Q
H
H
L
L
REV 6
16
Pinout: 16–Lead Packages (Top View)
16
Reset1
Reset2
1
Clock1
Clock2
MC74HCXXN
MC74HCXXD
V CC
Set1
Set2
MC74HC76
ORDERING INFORMATION
1
J1
1
2
3
4
5
6
7
8
PLASTIC PACKAGE
SOIC PACKAGE
CASE 751B–05
CASE 648–08
N SUFFIX
D SUFFIX
Plastic
SOIC
16
15
14
13
12
10
11
9
K1
Q1
Q1
GND
K2
Q2
Q2
J2

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MC74HC76N Summary of contents

Page 1

... Reset Clock Both outputs will remain low as long as Set and Reset are low, but the output states are unpredictable if Set and Reset go high simultaneously. 10/95 Motorola, Inc. 1995 Pinout: 16–Lead Packages (Top View) Clock1 Reset1 Clock2 Reset2 Outputs Change Toggle X No Change ...

Page 2

... Maximum Input Leakage Current I CC Maximum Quiescent Supply Current (per Package) NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D). MOTOROLA Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 3

... Maximum Output Transition Time, Any Output t THL (Figures 1 and Maximum Input Capacitance NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High– Speed CMOS Data Book (DL129/D Power Dissipation Capacitance (Per Flip–Flop)* Power Dissipation Capacitance (Per Flip– ...

Page 4

... PLH 90 50% 10% t TLH t THL Figure 1. Valid 50 Clock 50% Figure 3. 3,8 Reset 4,9 J 16, 1,6 Clock 2,7 Set MOTOROLA SWITCHING WAVEFORMS Set or Reset PHL GND PLH Clock V CC GND V CC GND *Includes all probe and jig capacitance Figure 5. Expanded Logic Diagram 50% ...

Page 5

... Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “ ...

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