ADV7176KS Analog Devices, ADV7176KS Datasheet

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ADV7176KS

Manufacturer Part Number
ADV7176KS
Description
Integrated Digital CCIR-601 YCrCb to PAL/NTSC Video Encoder
Manufacturer
Analog Devices
Datasheet

Specifications of ADV7176KS

Dc
9722
Case
QFP

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a
*This device is protected by U.S. Patent Numbers 4631603, 4577216, 4819098 a nd other intellectual property rights. The Macrovision anticopy process is
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
licensed for noncommercial home use only, which is its sole intended use in the devic e. Please contact sales office for latest Macrovision version available.
FEATURES
CCIR-601 YCrCb to PAL/NTSC Video Encoder
Single 27 MHz Clock Required ( 2 Oversampling)
Pixel Port Supports:
SMPTE 170M NTSC Compatible Composite Video Output
CCIR624/CCIR601 PAL Compatible Composite Video Output
SCART/PeriTV Support
YUV Output Mode
Simultaneous Composite and S-VHS Y/C or RGB YUV
Programmable Luma Filters (Low-Pass/Notch)
Square Pixel Support (Slave Mode)
Allows Subcarrier Phase Locking with External Video
10-Bit DAC Resolution for Encoded Video Channels
8-Bit DAC Resolution for RGB Output
YUV Interpolation for Accurate Subcarrier Construction
Programmable Subcarrier Frequency and Phase
Programmable LUMA Delay
Color Signal Control/Burst Signal Control
Interlaced/Noninterlaced Operation
Complete On-Chip Video Timing Generator
Master/Slave Operation Supported
Master Mode Timing Programmability
Macrovision Antitaping Facility Rev 6.1/7.x (ADV7175 Only)*
CCIR-656 4:2:2 8-Bit Parallel Input Format
4:2:2 16-Bit Parallel Input Format
Video Outputs
Source
FIELD/VSYNC
P15–P8
COLOR
HSYNC
BLANK
RESET
DATA
P7–P0
V
AA
POLATOR
4:2:2 TO
INTER-
4:4:4
VIDEO TIMING
GENERATOR
CLOCK
8
8
8
MATRIX
YCrCb
YUV
TO
SCLOCK SDATA ALSB
8
8
8
I
2
C MPU PORT
FUNCTIONAL BLOCK DIAGRAM
MATRIX
YUV TO
BURST
BURST
SYNC
ADD
ADD
ADD
RBG
8
8
8
POLATOR
POLATOR
POLATOR
INTER-
INTER-
INTER-
SCRESET/RTC
YCrCb to PAL/NTSC Video Encoder
REAL-TIME
CONTROL
CIRCUIT
8
8
8
8
8
8
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
GENERAL DESCRIPTION
The ADV7175/ADV7176 is an integrated digital video encoder
that converts Digital CCIR-601 4:2:2 component video data into a
standard analog baseband television signal compatible with world
wide standards NTSC, PAL B/D/G/H/I, PAL M or PAL N. In
addition to the composite output signal, there is the facility to out-
put S-VHS Y/C video, YUV or RGB video. The Y/C, YUV or
RGB format is simultaneously available at the analog outputs with
the composite video signal. Each analog output generates a
standard video-level signal into a doubly terminated 75
LOW-PASS
LOW-PASS
LOW-PASS
Close Captioning Support
Teletext Support (Passthrough Mode)
On-Board Color Bar Generation
On-Board Voltage Reference
2-Wire Serial MPU Interface (I
+5 V CMOS Monolithic Construction
44-Pin PQFP Thermally Enhanced Package
APPLICATIONS
MPEG-1 and MPEG-2 Video
DVD
Digital Satellite/Cable Systems (Set Top Boxes/IRDs)
Video Games
CD Video/Karaoke
Professional Studio Quality
PC Video/Multimedia
FILTER
FILTER
FILTER
Y
U
V
Integrated Digital CCIR-601
10
DDS BLOCK
10
10
10
SIN/COS
10
ADV7175/ADV7176
ADV7175/ADV7176
GND
M
U
P
E
X
E
R
L
T
L
I
REFERENCE
10
VOLTAGE
10
10
10
CIRCUIT
2
C Compatible)
10-BIT
10-BIT
10-BIT
10-BIT
DAC
DAC
DAC
DAC
© Analog Devices, Inc., 1996
(Continued on page 6)
Fax: 617/326-8703
COMPOSITE
RED/
CHROMA/
V
BLUE/
COMPOSITE/
U
V
R
COMP
GREEN/
LUMA/
Y
REF
SET
load.

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ADV7176KS Summary of contents

Page 1

... Please contact sales office for latest Macrovision version available. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use ...

Page 2

ADV7175/ADV7176–SPECIFICATIONS Model Parameter STATIC PERFORMANCE Resolution (Each DAC) Accuracy (Each DAC) Integral Nonlinearity Differential Nonlinearity DIGITAL INPUTS Input High Voltage, V INH Input Low Voltage, V INL Input Current Input Capacitance DIGITAL OUTPUTS Output High Voltage, ...

Page 3

AC CHARACTERISTICS Parameter Chroma Nonlinear Gain Chroma Nonlinear Phase Chroma Nonlinear Phase Chroma/Luma Intermod Chroma/Luma Intermod Chroma/Luma Gain Ineq Chroma/Luma Delay Ineq Luminance Nonlinearity Chroma AM Noise Chroma PM Noise TIMING–SPECIFICATIONS Parameter 1 MPU PORT SCLOCK Frequency SCLOCK High ...

Page 4

... ESD precautions are recommended to avoid performance degradation or loss of functionality Figure 1. MPU Port Timing Diagram CLOCK HSYNC, BLANK DATA t 11 HSYNC, BLANK Figure 2. Pixel and Control Data Timing Diagram + 0 Model ADV7175KS ADV7176KS AA –4– ORDERING GUIDE Temperature Range + +70 C WARNING! ESD SENSITIVE DEVICE Package Option S-44 S-44 REV. A ...

Page 5

Mnemonic Input/Output P15-P0 I CLOCK I HSYNC I/O FIELD/VSYNC I/O BLANK I/O SCRESET/RTC I V I/O REF R I SET COMP O COMPOSITE O RED/CHROMA/V O GREEN/LUMA/Y O BLUE/COMPOSITE/U O SCLOCK I SDATA I/O ALSB I RESET ...

Page 6

ADV7175/ADV7176 (Continued from page 1) The ADV7175/ADV7176 also supports both a PAL and NTSC square pixel mode in slave mode. The video encoder accepts an 8-bit parallel pixel data stream in CCIR-656 format or a 16-bit parallel data stream. This ...

Page 7

TYPE A –20 –40 –60 –80 –100 –120 FREQUENCY – MHz Figure 5. NTSC Low-Pass Filter 0 –20 –40 –60 –80 –100 –120 FREQUENCY – MHz Figure 6. NTSC Notch Filter ...

Page 8

ADV7175/ADV7176 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 FREQUENCY – MHz Figure 10. NTSC UV Filter COLOR BAR GENERATION The ADV7175/ADV7176 can be configured to generate 75% amplitude, 75% saturation (75/7.5/75/7.5) ...

Page 9

Mode 0 (CCIR-656): Slave Option. (Timing Register 0 TR0 = The ADV7175/ADV7176 is controlled by the SAV (Start Active Video) and EAV (End Active Video) time codes in the pixel data. All ...

Page 10

ADV7175/ADV7176 DISPLAY 622 623 624 625 H V EVEN FIELD F DISPLAY 309 310 311 312 ODD FIELD ANALOG VIDEO Figure 16. Timing Mode 0 Data Transitions (Master Mode) VERTICAL BLANK ...

Page 11

Mode 1: Slave Option. HSYNC, BLANK, FIELD. (Timing Register 0 TR0 = this mode the ADV7175/ADV7176 accepts horizontal SYNC and Odd/Even FIELD signals. A transition of the FIELD input when HSYNC ...

Page 12

ADV7175/ADV7176 Mode 1: Master Option. HSYNC, BLANK, FIELD. (Timing Register 0 TR0 = this mode the ADV7175/ADV7176 can generate horizontal SYNC and Odd/Even FIELD signals. A transition of the FIELD input ...

Page 13

DISPLAY 622 623 624 625 HSYNC BLANK EVEN FIELD VSYNC DISPLAY 309 310 311 312 HSYNC BLANK VSYNC ODD FIELD Mode 2: Master Option. HSYNC, VSYNC, BLANK. (Timing Register 0 TR0 = ...

Page 14

ADV7175/ADV7176 HSYNC VSYNC PAL = 12 * CLOCK/2 NTSC = 16 * CLOCK/2 BLANK PIXEL DATA LINE 265 Figure 23. Timing Mode 2 Odd-to-Even Field Transition Mode 3: Master/Slave Option. HSYNC, BLANK, FIELD. (Timing Register 0 TR0 = X X ...

Page 15

DISPLAY 622 623 624 625 HSYNC BLANK FIELD EVEN FIELD DISPLAY 309 310 311 312 HSYNC BLANK FIELD EVEN FIELD (Continued from page 8) In addition the ADV7175/ADV7176 supports a PAL or NTSC square pixel operation in slave mode. The ...

Page 16

ADV7175/ADV7176 MPU PORT DESCRIPTION The ADV7175 and ADV7176 support a two wire serial (I compatible) microprocessor bus driving multiple peripherals. Two inputs serial data (SDATA) and serial clock (SCLOCK) carry information between any device connected to the bus. Each slave ...

Page 17

SR7 SR6 SR7–SR5 (000) ZERO SHOULD BE WRITTEN TO THESE BITS REGISTER ACCESSES The MPU can write to or read from all of the registers of the ADV7175/ADV7176 except the subaddress register which is a write only register. The subaddress ...

Page 18

ADV7175/ADV7176 MODE REGISTER 0 (MR07–MR00) BIT DESCRIPTION Encode Mode Control (MR01–MR00): These bits are used to set up the encode mode. The ADV7175/ ADV7176 can be set up to output NTSC, PAL ( I), PAL (M) and ...

Page 19

SUBCARRIER FREQUENCY REGISTERS 3–0 (FSC3–FSC0) (Address (SR4–SR0) = 05H–02H) These 8-bit wide registers are used to set up the subcarrier fre- quency. The value of these registers are calculated by using the following equation – Subcarrier ...

Page 20

ADV7175/ADV7176 CLOSED CAPTIONING EXTENDED DATA REGISTERS 1–0 (CED15–CED00) (Address (SR4–SR0) = 09–08H) These 8-bit wide registers are used to set up the closed captioning extended data bytes. Figure 35 shows how the high and low bytes are set up in ...

Page 21

MR27 RGB/YUV CONTROL MR26 0 1 LOWER POWER MODE MR27 0 DISABLE 1 ENABLE CCIR624/CCIR601 Control (MR23) This bit switches the video output between CCIR624 and CCIR601 video standard. Chrominance Control (MR24) This bit enables the color information to be ...

Page 22

ADV7175/ADV7176 BOARD DESIGN AND LAYOUT CONSIDERATIONS The ADV7175/ADV7176 is a highly integrated circuit contain- ing both precision analog and high speed digital circuitry. It has been designed to minimize interference effects on the integrity of the analog circuitry by the ...

Page 23

AA AA 0.1µF 0.1µF 38–42, 2–9, 12–14 “UNUSED INPUTS SHOULD BE GROUNDED” 27MHz CLOCK (SAME CLOCK AS USED BY MPEG2 DECODER) + 10k The circuit below can be used to generate ...

Page 24

ADV7175/ADV7176 The ADV7175/ADV7176 supports closed captioning conforming to the standard television synchronizing waveform for color trans- mission. Closed captioning is transmitted during the blanked active line time of line 21 of the odd fields. Closed captioning consists of a 7-cycle ...

Page 25

IRE 100 IRE 7.5 IRE 0 IRE –40 IRE 100 IRE 7.5 IRE 0 IRE –40 IRE 1067.7mV 286mV (pk-pk) 650mV 232.2mV 0mV 100 IRE 7.5 IRE 0 IRE –40 IRE REV. A APPENDIX 3 NTSC WAVEFORMS (With Pedestal) ...

Page 26

ADV7175/ADV7176 130.8 IRE 100 IRE 0 IRE –40 IRE 100 IRE 0 IRE –40 IRE 1101.6mV 307mV (pk-pk) 650mV 198.4mV 0mV 100 IRE 0 IRE –40 IRE NTSC WAVEFORMS (Without Pedestal) Figure 48. NTSC Composite Video Levels 714.2mV Figure 49. ...

Page 27

REV. A PAL WAVEFORMS Figure 52. PAL Composite Video Levels Figure 53. PAL Luma Video Levels 885mV (pk-pk) Figure 54. PAL Chroma Video Levels ...

Page 28

ADV7175/ADV7176 The ADV7175/ADV7176 registers can be set depending on the user standard required. The following examples give the various register formats for several video standards. In each case the output is set to composite o/p with all DACs powered up ...

Page 29

If an output filter is required for the composite output of the ADV7175/ADV7176. The following filter can be used. Plots of the filter characteristics can be produced on request. IN REV. A APPENDIX 5 OUTPUT FILTER 2.7µH ...

Page 30

ADV7175/ADV7176 Figure 58. 100/75% Color Bars NTSC (Chrominance Only) APPENDIX 6 OUTPUT WAVEFORMS Figure 57. 100/75% Color Bars NTSC –30– REV. A ...

Page 31

Figure 59. 100/75% Color Bars NTSC (Luminance Only) REV. A Figure 60. 100/75% Color Bars PAL –31– ADV7175/ADV7176 ...

Page 32

ADV7175/ADV7176 Figure 61. Differential Phase and Gain Measurements (PAL) Figure 62. Vectorscope Measurements (PAL) –32– REV. A ...

Page 33

REV. A Figure 63. Modulated Ramp Measurements (PAL) –33– ADV7175/ADV7176 ...

Page 34

ADV7175/ADV7176 INDEX Contents GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . 1 ADV7175/ADV7176 SPECIFICATIONS . . . . . . . . ...

Page 35

REV. A OUTLINE DIMENSIONS Dimensions shown in inches and (mm). Plastic Quad Flatpack (S-44) 0.548 (13.925) 0.546 (13.875) 0.096 (2.44) 0.398 (10.11) MAX 0.390 (9.91) 0.037 (0.94) 8 0.025 (0.64) 33 0.8 34 SEATING PLANE TOP VIEW (PINS DOWN) 4 ...

Page 36

–36– ...

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