MC100EP196 ON Semiconductor, MC100EP196 Datasheet
MC100EP196
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MC100EP196 Summary of contents
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... MC100EP196 3.3V ECL Programmable Delay Chip with FTUNE The MC100EP196 is a programmable delay chip (PDC) designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar architecture to the EP195 with the added feature of further tuneability in delay using the FTUNE pin ...
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... MC100EP196 MC100EP196 D10 Figure 1. 32−Lead LQFP Pinout (Top View) http://onsemi.com 2 V FTUNE CASCADE 14 CASCADE SETMAX 11 SETMIN 10 LEN ...
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... SETMIN will override SETMAX if both are high. SETMAX and SETMIN will override all D[0:10] inputs. 2. All V and V pins must be externally connected to Power Supply to guarantee proper operation MC100EP196 Default State LOW Single−ended Parallel Data Inputs [0:9]. Internal (Note 1) LOW Single−ended CASCADE/CASCADE Control Input. Internal ...
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... Table 4. DATA INPUT ALLOWED OPERATING VOLTAGE MODE TABLE POWER SUPPLY PECL Mode Operating Range NECL Mode Operating Range MC100EP196 Input Signal is Propagated to the Output Output Holds Logic Low State Transparent or LOAD mode for real time delay values present on D[0:10]. LOCK and HOLD mode for delay values on D[0:10]; further changes on D[0:10] are not recognized and do not affect delay ...
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FTUNE 512 256 128 GD* GD* GD* EN LEN SET MIN SET MAX CASCADE Latch CASCADE D10 ...
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... Table 5. THEORETICAL DELTA DELAY VALUES D(9:0) Value XXXXXXXXXX 0000000000 0000000001 0000000010 0000000011 0000000100 0000000101 0000000110 0000000111 0000001000 0000010000 0000100000 0001000000 0010000000 0100000000 1000000000 1111111111 XXXXXXXXXX *Fixed minimum delay not included. Table 6. TYPICAL FTUNE DELAY PIN Input Range V −V ( MC100EP196 SETMIN SETMAX ...
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... Internal Input Pullup Resistor ESD Protection Moisture Sensitivity (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. MC100EP196 300 400 500 600 Decimal Value of Select Inputs (D[9:0]) Characteristics Human Body Model ...
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... Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. MC100EP196 Condition 1 Condition 2 ...
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... Input and output parameters vary 1:1 with V 3. All loading with − 2 min varies 1:1 with IHCMR EE IHCMR input signal. MC100EP196 (Note −40 C Min Typ Max Min 100 ...
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... Input and output parameters vary 1:1 with V 6. All loading with − 2 min varies 1:1 with IHCMR EE IHCMR input signal. MC100EP196 −3.3 V (Note −40 C Min Typ Max Min 100 ...
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... This hold time is the minimum time that EN must remain asserted after a negative going IN or positive going IN to prevent an output response greater than V − 1425 mV to that IN/IN transition. CC 15. This release time is the minimum time that EN must be deasserted prior to the next IN/IN transition to ensure an output response that meets the specified propagation delay and transition times. MC100EP196 = −3 −3 − ...
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... V EE Figure 5. Typical EP196 Delay versus FTUNE Voltage MC100EP196 PHL t PLH Figure 4. AC Reference Measurement FTUNE pin will be capable even under worst case conditions of covering a digital resolution. Typically, the analog input will be driven by an external DAC to provide a digital control with very fine analog output steps ...
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... Figure 6. Cascading Interconnect Architecture MC100EP196 expanded for larger EP196 chains. The D10 input of the EP196 is the cascade control pin and when assert HIGH switches output pin CASCADE to HIGH and pin CASCADE to LOW. With the interconnect scheme of Figure 6 when D10 is asserted, it signals the need for a larger programmable range than is achievable with a single device ...
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... SET MIN SET MAX Figure 7. Expansion of the Latch Section of the EP196 Block Diagram MC100EP196 chip #2 will be deasserted and the SETMAX pin asserted, resulting in the device delay to be the maximum delay. Table 12 shows the delay time of two EP196 chips in cascade. To expand this cascading scheme to more devices, one ...
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... Table 12. CASCADED DELAY VALUE OF TWO EP196S VARIABLE INPUT TO CHIP #1 AND SETMIN FOR CHIP #2 INPUT FOR CHIP #1 D10 VARIABLE INPUT TO CHIP #1 AND SETMAX FOR CHIP #2 INPUT FOR CHIP #1 D10 MC100EP196 http://onsemi.com 15 Total Delay Value Delay Value 4400 4410 4420 4430 4440 ps ...
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... EP196 as shown in Digital Data Control Logic MC100EP196 Figure 8. One signal channel can be used as reference and the other EP196s can be used to adjust the delay to eliminate the timing skews. Nearly any high−speed system can be fine tuned (as small as 10 ps) to reduce the skew to extremely tight tolerances using the available FTUNE pin ...
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... Figure 9. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) ORDERING INFORMATION Device MC100EP196FA MC100EP196FAR2 †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MC100EP196 = ...
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... MC100EP196 Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1642/D − The ECL Translator Guide AND8001/D − ...
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... DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE D DIMENSION TO EXCEED 0.520 (0.020). 8. MINIMUM SOLDER PLATE THICKNESS SHALL BE 0.0076 (0.0003). 9. EXACT SHAPE OF EACH CORNER MAY VARY FROM DEPICTION. MC100EP196 PACKAGE DIMENSIONS 32 LEAD LQFP CASE 873A−02 ISSUE B 4X 0.20 (0.008) AB T− ...
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... USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 20 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. MC100EP196/D ...