IDT70V5378 Integrated Device Technology, Inc., IDT70V5378 Datasheet
IDT70V5378
Specifications of IDT70V5378
Related parts for IDT70V5378
IDT70V5378 Summary of contents
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... P1 CLK P 1 MRST CNTINT P1 NOTE for IDT70V5378 Port 2, Port 3, and Port 4 Logic Blocks are similar to Port 1 Logic Blocks. ©2002 Integrated Device Technology, Inc. 3.3V 64/32K X 18 SYNCHRONOUS FOURPORT™ STATIC RAM Counter wrap-around control – Internal mask register controls counter wrap-around – ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM The IDT70V5388/ high-speed 64/32Kx18 bit synchronous FourPort RAM. The memory array utilizes FourPort memory cells to allow simultaneous access of any address from all four ports. Registers on control, ...
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... NOTES for IDT70V5378 This package code is used to reference the package diagram. 3. This text does not indicate orientation of the actual part marking. 4. Package body is approximately 27mm x 27mm x 2.33mm, with 1.27mm ball-pitch. 5. Central leads are for thermal dissipation only. They are connected to device V ...
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... I NOTES for IDT70V5378 Package body is approximately 17mm x 17mm x 1.4mm, with 1.0mm ball-pitch. 3. This package code is used to reference the package diagram. 4. This text does not indicate orientation of the actual part-marking. 70V5388/78BC (3) BC-256 256-Pin BGA (4) Top View I/O I/O I/O I/O I/O I/O ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM Port 1 Port 2 Port 3 (1) ( I/O - I/O I/O ...
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... INT INT INT TRST NOTE for IDT70V5378 ort 3 P ort nte ut rting MKLD = MKLD line tha rt ratio ns are rib tail MKRD nte Inp ut rting this s ig nal (MKRD = line nte r and r ratio nal Tab ate uire d s tate the unte tro ls d urin g this ratio tha ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM MRST CNTRST MKLD CLK ( NOTES: ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM Symbol Rating (2) Terminal Voltage V TERM with Respect to GND (3) Temperature Under Bias T BIAS T Storage Temperature STG T Junction Temperature Output Current OUT NOTES: ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM Symbol Parameter Dynamic Operating Current (All Outputs Disabled, Ports Active) ( ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM Input Pulse Levels (Address & Controls) Input Pulse Levels (I/Os) Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load DATA OUT tCD (Typical, ns) 4 ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM Sym bol Param eter Fre Tim ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM Symbol Interrupt Timing Clock to INT Set Time t S INT Clock to INT Reset Time t R INT Clock to CNTINT Set Time t S CIN T Clock to CNTINT ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM t CH2 CLK LB (4) ADDRESS An (1 ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM CLK "A" R/W "A" ADDRESS "A" MATCH DATA VALID IN"A" t CCS CLK "B" R/W "B" ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM t CYC2 t t CH2 CL2 CLK LB (3) An ADDRESS t ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM t CYC2 t CH2 CLK ADDRESS (3) INTERNAL ADDRESS t t SCLD HCLD CNTLD CNTINC DATA IN WRITE EXTERNAL ADDRESS t ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM CLK t RS MRST t ROF ALL ADDRESS/ DATA LINES ALL OTHER INPUTS CNTINT INT NOTES: 1. Master Reset will reset the device. For JTAG and MBIST reset please refer to ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM t CYC2 t t CH2 CL2 CLK SCLD HCLD CNTLD CNTINC t SCINC CNTRD INTERNAL ADDRESS DATA OUT ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM t CYC2 t CH2 CLK EXTERNAL 007Fh xx7Dh ADDRESS t t HMLD SMLD MKLD t SCLD CNTLD CNTINC COUNTER A INTERNAL ADDRESS (2 ) CNTINT t CYC2 t CH2 CLK P1 ...
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... IDT70V5388/78 Control Inputs IDT70V5388/78 Control Inputs NOTE for IDT70V5388 for IDT70V5378 may produce indeterminate data for the read. Two or CCS more ports attempting to write the same address location simultaneously will result in indeterminate data recorded at that address. Each port is equipped with dual chip enables, CE ...
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... for IDT70V5378, therefore Mailbox Interrupt Addresses are 7FFF, 7FFE, 7FFD and 7FFC. Address comparison will be for A 15 possible disabling the byte enables during that write cycle ...
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... CNTRST CLK the array (i.e., address FFFFh for IDT70V5388 and address 7FFFh for IDT70V5378 reaches the highest value permitted by the Counter Mask Register, it then ‘wraps around’ to the beginning of the array. When Address Min is reached via counter increment (i.e., not as a result of an ...
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... Address Register NOTE: 1. The "X's" in this diagram represent the upper bits of the counter for IDT70V5378. 15 The internal address counter on each port has an associated Counter Mask Register that allows for configu- ration of the internal address counter on that port. Truth Table III groups the operations of the address counter with those of the counter mask register, to include Master Reset and applicable readback operations ...
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... SPC is the synchronization padding cycles (typically 4-6 cycles, to accommodate state machine overhead, turn- around cycles, etc constant that represents the number of read and write operations required to run the internal MBIST algorithms (14,811,136) for both IDT70V5388 and IDT70V5378. 25 6.42 Preliminary SPC, where: ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM MBIST Mode Select Register (MSR) TDI CONTROLLER CLKMBIST Bypass Register (BYR Instruction Register (IR MBIST Result Register (MRR ...
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IDT70V5388/78 3.3V 64/32K x 18 Synchronous FourPort™ Static RAM TCK (1) Device Inputs / TDI/TMS (2) Device Outputs / TDO TRST t JRST NOTES: 1. Device inputs = All device inputs except TDI, TMS, and TRST. 2. Device outputs = ...
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... Synchronous FourPort™ Static RAM Instruction Field Revision Number (31:28) IDT Device ID (27:12) IDT JEDEC ID (11:1) ID Register Indicator Bit (Bit 0) NOTE: 1. Device ID for IDT70V5378 is 0x31E. Register Nam e Instructio n (IR iste ass ( ntific atio n (IDR und ary S can ( ...
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... Preliminary datasheets contain descriptions for products that are in early release. 08/20/02: Initial Public Datashee 09/25/02: Added 0.5M Density to Datasheet CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 The IDT logo is a registered trademark of Integrated Device Technology, Inc Package Process/ Temperature Range Blank ...