CY7C375I Cypress Semiconductor Corporation., CY7C375I Datasheet
CY7C375I
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CY7C375I Summary of contents
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... V 3.3IO Cypress Semiconductor Corporation Document #: 38-03029 Rev. ** UltraLogic™ 128-Macrocell Flash CPLD Functional Description The CY7C375i is an In-System Reprogrammable Complex Programmable Logic Device (CPLD) and is part of the F 370i™ family of high-density, high-speed CPLDs. Like LASH all members of the F signed to bring the ease of use and high performance of the 22V10 to high-density PLDs ...
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... CCIO 40 Document #: 38-03029 Rev. ** Top View TQFP CY7C375i V 120 CCIO I/O 119 111 118 I/O 110 117 I/O 109 116 I/O /SDI 108 I/O 115 107 114 I/O 106 113 I/O 105 112 I/O 104 111 GND ...
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... GND Document #: 38-03029 Rev. ** Top View CQFP CY7C375i V 120 CC I/O 119 111 118 I/O 110 117 I/O 109 I/O /SDI 116 108 I/O 115 107 I/O 114 106 I/O 113 105 112 I/O 104 111 GND 110 ...
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... Like all members of the F 370i family, the CY7C375i is rich LASH in I/O resources. Every macrocell in the device features an associated I/O pin, resulting in 128 I/O pins on the CY7C375i. In addition, there is one dedicated input and four input/clock pins. Finally, the CY7C375i features a very simple timing model. ...
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... I/O pin is used as an input. Programmable Interconnect Matrix The Programmable Interconnect Matrix (PIM) connects the eight logic blocks on the CY7C375i to the inputs and to each other. All inputs (including feedbacks) travel through the PIM. There is no speed penalty incurred by signals traversing the PIM ...
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... CC [6] 0 –70 –30 Com’l/Ind. 125 Com’l “L” –66 75 Military 125 +75 –75 Min. Max CCINT = 0.5V has been chosen to avoid test OUT pin Max. EN CY7C375i Max. Unit V V 4.0 V 3 7.0 V 0.8 V +10 A +50 A –125 A –160 mA 200 ...
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... INCLUDING JIG AND (b) 7C375i–4 SCOPE 2.08V(COM'L) 2.13V(MIL) Output Waveforms--Measurement Level V OH 0. 0.5V measured with 35-pF AC Test Load. EA CY7C375i 160-Pin 160-Pin TQFP CQFP CPGA Max. 100 ALL INPUT PULSES 3.0V 90% 10% GND <2ns V X 7C375i 7c375i-7 V ...
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... All AC parameters are measured with 16 outputs switching and 35-pF AC Test Load. 14. This specification is intended to guarantee interface compatibility of the other members of the CY7C370i family with the CY7C375i. This specification is met for the devices operating at the same ambient temperature and at the same power supply voltage. ...
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... Document #: 38-03029 Rev. ** [13] (continued) 7C375i–125 7C375i–100 Min. Max. Min. 8 125 100 , 1/( ICS WL WH [9] 10 [9] 12 [1] 16 [9] 10 [9] 12 [1] 16 500 500 CY7C375i 7C375i–83 7C375i–66 7C374iL–83 7C375iL–66 Max. Min. Max. Min 83.3 66 500 500 Max. Unit ...
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... Latched Output INPUT LATCH ENABLE LATCHED OUTPUT Registered Input REGISTERED INPUT INPUT REGISTER CLOCK COMBINATORIAL OUTPUT CLOCK Clock to Clock REGISTERED INPUT INPUT REGISTER CLOCK OUTPUT REGISTER CLOCK Document #: 38-03029 Rev PDL ICS CY7C375i ICO SCS Page 7C375i–12 7C375i–13 7C375i–14 ...
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... Latched Input LATCHED INPUT LATCH ENABLE COMBINATORIAL OUTPUT LATCH ENABLE Latched Input and Output LATCHED INPUT LATCHED OUTPUT INPUT LATCH ENABLE OUTPUT LATCH ENABLE LATCH ENABLE Document #: 38-03029 Rev PDL ICOL t ICS t WH CY7C375i t ICO PDLL Page 7C375i–15 7C375i–16 ...
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... Switching Waveforms (continued) Asynchronous Reset INPUT REGISTERED OUTPUT CLOCK Asynchronous Preset INPUT REGISTERED OUTPUT CLOCK Output Enable/Disable INPUT OUTPUTS Document #: 38-03029 Rev CY7C375i 7C375i–17 7C375i–18 7C375i–20 Page ...
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... Ordering Information Speed (MHz) Ordering Code 125 CY7C375i–125AC 100 CY7C375i–100AC CY7C375i–100AI 83 CY7C375i–83AC CY7C375i–83AI CY7C375i–83GMB CY7C375i–83UMB CY7C375iL–83AC 66 CY7C375i–66AC CY7C375i–66AI CY7C375i–66GMB CY7C375i–66UMB CY7C375iL–66AC MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics Parameter Subgroups ...
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... Package Diagrams Document #: 38-03029 Rev. ** 160-Pin Thin Plastic Quad Flat Pack (TQFP) A160 CY7C375i 51-85049-A Page ...
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... Package Diagrams (continued) Document #: 38-03029 Rev. ** 160-Pin PGA G160 CY7C375i Page ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 160-Lead Ceramic Quad Flatpack (Cavity Up) U162 CY7C375i Page ...
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... Document Title: CY7C375i UltraLogic™ 128-Macrocell Flash CPLD Document Number: 38-03029 Issue REV. ECN NO. Date ** 106374 09/15/01 Document #: 38-03029 Rev. ** Orig. of Change Description of Change SZV Change from Spec number: 38-00494 to 38-03029 CY7C375i Page ...