CY7C024-55JC Cypress Semiconductor Corporation., CY7C024-55JC Datasheet
CY7C024-55JC
Specifications of CY7C024-55JC
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CY7C024-55JC Summary of contents
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... CY7C025/0251 to handle situations when multiple processors access the same piece of data. Two ports are provided, permitting independent, asynchronous access for reads and writes to any location in memory. The CY7C024/ 0241 and CY7C025/0251 can be utilized as standalone 16-/18-bit dual-port static RAMs or multiple devices can be combined in order to function as a 32-/36-bit or wider master/ slave dual-port static RAM ...
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... Notes: 1. BUSY is an output in master mode and an input in slave mode. 2. I/O –I/O on the CY7C0241/0251 I/O –I/O on the CY7C0241/0251 the CY7C025/0251. 12L the CY7C025/0251. 12R Document #: 38-06035 Rev. *C I/O I/O CONTROL CONTROL MEMORY ADDRESS ADDRESS ARRAY DECODER DECODER INTERRUPT ...
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... I/O 10 15L I/O 11 16L GND I/O 23 17R Document #: 38-06035 Rev. *C 100-Pin TQFP Top View CY7C024 100-Pin TQFP Top View CY7C0241/0251 CY7C024/0241 CY7C025/0251 INT 65 L BUSY 64 L GND 63 M/S 62 BUSY 61 R INT INT 65 L BUSY 64 L GND 63 M/S ...
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... Read Operation When reading the device, the user must assert both the OE and CE pins. Data will be available asserted. If the user of the CY7C024/0241 or CY7C025/0251 wishes to access a semaphore flag, then the SEM pin must be asserted instead of the CE pin, and OE must also be asserted. Interrupts The upper two memory locations may be used for message passing ...
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... Busy The CY7C024/0241 and CY7C025/0251 provide on-chip arbitration to resolve simultaneous memory location access (contention). If both ports’ CEs are asserted and an address match occurs within t of each other, the busy logic will PS determine which port has access will definitely gain permission to the location, but which one is not predictable ...
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... Right port obtains semaphore token change. Left port has no write access to semaphore 0 1 Left port obtains semaphore token 1 1 Semaphore-free 1 0 Right port has semaphore token 1 1 Semaphore-free 0 1 Left port has semaphore token 1 1 Semaphore-free CY7C024/0241 CY7C025/0251 Right Port R INT 0R–11R (1)FFF ...
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... MAX Test Conditions V = Min –4 Min 4 GND ≤ V ≤ ≤ CY7C024/0241 CY7C025/0251 [10] ........................................–0.5V to +7.0V Ambient Temperature ± 10% 0°C to +70°C 5V ± 10% –40°C to +85°C 7C024/0241–15 7C024/0241–25 7C025/0251–15 7C025/0251–25 Unit 2.4 0.4 0.4 2.2 0.8 – ...
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... TH OUTPUT C = 30pF V = 1.4V TH (b) Thévenin Equivalent (Load 1) ALL INPUT PULSES 90% 90% 10% 10% ≤ ≤ CY7C024/0241 CY7C025/0251 7C024/0241–35 7C024/0241–55 7C025/0251–35 7C025/0251–55 Min. Typ. Max. Min. Typ. Max. 160 230 150 230 160 260 150 260 30 50 ...
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... Min. Max. Min. Max. Min less than t and t is less than t HZCE LZCE HZOE CY7C024/0241 CY7C025/0251 7C024/0241–55 7C025/0251–55 Max. Min. Max. Unit time. SCE . LZOE Page [+] Feedback ...
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... Window t SEM Address Access Time SAA Data Retention Mode The CY7C024/0241 is designed with battery backup in mind. Data retention voltage and supply current are guaranteed over temperature. The following rules insure data retention: 1. Chip enable (CE) must be held HIGH during data retention, within – ...
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... To access RAM SEM = Document #: 38-06035 Rev. *C [22, 23, 24 DATA VALID [22, 25, 26] t ACE t DOE t LZOE t LZCE LZCE t ABE t ACE t LZCE . This waveform cannot be used for semaphore reads access semaphore SEM = CY7C024/0241 CY7C025/0251 t OHA t HZCE t HZOE DATA VALID OHA t HZCE t HZCE Page [+] Feedback ...
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... If the CE or SEM LOW transition occurs simultaneously with or after the R/W LOW transition, the outputs remain in the high-impedance state. Document #: 38-06035 Rev. *C [27, 28, 29, 30 [30] t PWE [33] t HZWE t SD [27, 28, 29, 35 SCE PWE . IH . CY7C024/0241 CY7C025/0251 [33] t HZOE LZWE NOTE allow the I/O drivers to turn off and data to be HZWE SD Page [+] Feedback ...
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... SPS Document #: 38-06035 Rev. *C [36 VALID ADRESS SCE SOP t SD DATA VALID PWE t SWRD t SOP WRITE CYCLE READ CYCLE [37, 38, 39] MATCH t SPS MATCH = HIGH. L CY7C024/0241 CY7C025/0251 t OHA t ACE DATA VALID OUT t DOE Page [+] Feedback ...
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... Timing Diagram of Read with BUSY (M/S=HIGH) ADDRESS R R/W R DATA ADDRESS L BUSY L DATA OUTL Write Timing with Busy Input (M/S=LOW) R/W BUSY Note: 40 LOW Document #: 38-06035 Rev. *C [40 MATCH t PWE t SD VALID MATCH t BLA t WDD t PWE CY7C024/0241 CY7C025/0251 BHA t BDD t DDD VALID Page [+] Feedback ...
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... BUSY will be asserted. PS Document #: 38-06035 Rev. *C [41] ADDRESS MATCH BLC ADDRESS MATCH BLC [41 ADDRESS MISMATCH t t BLA BHA ADDRESS MISMATCH t t BLA BHA CY7C024/0241 CY7C025/0251 t BHC t BHC Page [+] Feedback ...
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... Notes: 42. t depends on which enable pin ( deasserted first 43 depends on which enable pin (CE or R/W INS INR L Document #: 38-06035 Rev [42 (1FFF CY7C025) [43] t INR t WC [42 READ FFE (1FFE CY7C025) [43] t INR ) is asserted last. L CY7C024/0241 CY7C025/0251 t RC READ FFF t RC Page [+] Feedback ...
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... CY7C024-25JXC CY7C024–25AI CY7C024-25AXI CY7C024–25JI CY7C024-25JXI 35 CY7C024–35AC CY7C024-35AXC CY7C024–35JC CY7C024-35JXC CY7C024–35AI CY7C024-35AXI CY7C024–35JI CY7C024-35JXI 55 CY7C024–55AC CY7C024-55AXC CY7C024–55JC CY7C024-55JXC CY7C024–55AI CY7C024-55AXI CY7C024–55JI CY7C024-55JXI Ordering Information ( Dual-Port SRAM) Speed (ns) Ordering Code 15 CY7C025–15AC CY7C025-15AXC CY7C025– ...
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... CY7C0241-15AXI 25 CY7C0241–25AC CY7C0241-25AXC CY7C0241–25AI CY7C0241-25AXI 35 CY7C0241–35AC CY7C0241-35AXC CY7C0241–35AI CY7C0241-35AXI 55 CY7C0241–55AC CY7C0241-55AXC CY7C0241–55AI CY7C0241-55AXI Document #: 38-06035 Rev. *C (continued) Package Name Package Type A100 100-Pin Thin Quad Flat Pack A100 100-Pin Lead Free Thin Quad Flat Pack ...
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... Lead Free Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Lead Free Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Lead Free Thin Quad Flat Pack CY7C024/0241 CY7C025/0251 Operating Range Commercial Commercial Industrial Commercial Industrial ...
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... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CY7C024/0241 CY7C025/0251 ...
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... Document History Page Document Title: CY7C024/0241, CY7C025/0251 4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with Sem, Int, Busy Document Number: 38-06035 REV. ECN NO. Issue Date Change ** 110177 09/29/01 *A 122286 12/27/02 *B 236754 See ECN *C 279132 See ECN Document #: 38-06035 Rev. *C Orig. of ...