MC14070BCP

Manufacturer Part NumberMC14070BCP
ManufacturerON Semiconductor
MC14070BCP datasheet
 


1
Page 1
2
Page 2
3
Page 3
4
Page 4
5
Page 5
6
Page 6
7
Page 7
Page 1/7

Download datasheet (134Kb)Embed
Next
MC14070B, MC14077B
CMOS SSI
Quad Exclusive “OR” and “NOR” Gates
The MC14070B quad exclusive OR gate and the MC14077B quad
exclusive NOR gate are constructed with MOS P−channel and
N−channel enhancement mode devices in a single monolithic
structure. These complementary MOS logic gates find primary use
where low power dissipation and/or high noise immunity is desired.
Features
Supply Voltage Range = 3.0 Vdc to 18 Vdc
All Outputs Buffered
Capable of Driving Two Low−Power TTL Loads or One Low−Power
Schottky TTL Load Over the Rated Temperature Range
Double Diode Protection on All Inputs
MC14070B − Replacement for CD4030B and CD4070B Types
MC14077B − Replacement for CD4077B Type
Pb−Free Packages are Available
MAXIMUM RATINGS
(Voltages Referenced to V
Symbol
Parameter
V
DC Supply Voltage Range
DD
V
, V
Input or Output Voltage Range
in
out
(DC or Transient)
I
, I
Input or Output Current
in
out
(DC or Transient) per Pin
P
Power Dissipation, per Package
D
(Note 1)
T
Ambient Temperature Range
A
T
Storage Temperature Range
stg
T
Lead Temperature
L
(8−Second Soldering)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
to the range V
v (V
or V
) v V
.
SS
in
out
DD
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V
or V
). Unused outputs must be left open.
SS
DD
© Semiconductor Components Industries, LLC, 2006
October, 2006 − Rev. 7
)
SS
Value
Unit
−0.5 to +18.0
V
−0.5 to V
+ 0.5
V
DD
± 10
mA
500
mW
−55 to +125
°C
−65 to +150
°C
260
°C
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
and V
should be constrained
in
out
1
http://onsemi.com
MARKING
DIAGRAMS
14
PDIP−14
MC140xxBCP
P SUFFIX
AWLYYWWG
CASE 646
1
14
SOIC−14
140xxBG
D SUFFIX
AWLYWW
CASE 751A
1
14
SOEIAJ−14
MC140xxB
F SUFFIX
ALYWG
CASE 965
1
xx
= Specific Device Code
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W
= Work Week
G
= Pb−Free Package
ORDERING INFORMATION
Publication Order Number:
MC14070B/D

MC14070BCP Summary of contents