M5M5256DFP-70LL Renesas Electronics Corporation., M5M5256DFP-70LL Datasheet
M5M5256DFP-70LL
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M5M5256DFP-70LL Summary of contents
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... DESCRIPTION The M5M5256DFP,VP is 262,144-bit CMOS static RAMs organized as 32,768-words by 8-bits which is f abricated using high-perf ormance 3 poly silicon CMOS technology . The use of resistiv e load NMOS cells and CMOS periphery results in a high density and low power static RAM. Stand-by current is small enough f or battery back-up application ...
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... FUNCTION The operation mode of the M5M5256DFP,VP is determined by a combination of the dev ice control inputs /S, /W and /OE. Each mode is summarized in the f unction table. A write cy cle is executed whenev er the low lev erlaps with the low lev el /S. The address must be set up bef ore the write cy cle and must be stable during the entire cy cle ...
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... O Note 0: Direction f or current f lowing into positiv e (no mark pical v alue is one 25° are periodically sampled and are not 100% tested M5M5256DFP,VP-55LL,-70LL,-70LLI, 262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM Conditions With respect to GND Ta=25°C -LL,-XL -LLI _ ( Vcc=5V±10%, unless otherwise noted) ...
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... Output disable time from /OE high dis t (W) Output enable time from /W high en Output enable time from /OE low t (OE) en M5M5256DFP,VP-55LL,-70LL,-70LLI, 262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM ( Vcc=5V±10%, unless otherwise noted ) Parameter RENESAS LSIs -55XL,-70XL Limits -70LL,-70LLI, -55LL, 55XL -70 XL ...
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... TIMING DIAGRAMS Read cycle (Note 3) /OE (Note "H" lev el Write cycle (/W control mode (Note 3) / (Note 3) M5M5256DFP,VP-55LL,-70LL,-70LLI, 262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM ( ( (OE (OE (S) en DATA VALID ( (A-WH (A) (W) ( rec t (W) dis t ( (OE) dis DATA IN STABLE t t (D) ( RENESAS LSIs -55XL,-70XL ...
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... MEASUREMENT CONDITIONS Input pulse level .............. V IH Input rise and fall time ..... 5ns Reference level ................ V OH Output load ...................... Fig.1 CL=50pF (-55LL,-55XL ) Transition is measured ±500mV from steady state voltage. (for ten,tdis) M5M5256DFP,VP-55LL,-70LL,-70LLI, 262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM (A) ( ...
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... Power down set up time su (PD) t Power down recov ery time rec (PD) (3) POWER DOWN CHARACTERISTICS /S control mode Vcc 2.2V /S M5M5256DFP,VP-55LL,-70LL,-70LLI, 262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM ( Vcc=5V±10%, unless otherwise noted) Test conditions _ 2.2V < V CC(PD 2V< V < 2.2V CC(PD) ~25° ...
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... P lease contact Renesas T echnology Corporation for further details on these m aterials or the products contained therein. REJ03C0055 © 2003 Renesas Technology Corp. New publication, effective Feb 2004. Specifications subject to change without notice M5M5256DFP,VP-55LL,-70LL,-70LLI, 262144-BIT (32768-WORD BY 8-BIT) CMOS STATIC RAM Nippon Bldg.,6-2,Otemachi 2-chome,Chiyoda-ku,Tokyo,100-0004 Japan RENESAS LSIs ...