MPC946 Freescale Semiconductor, Inc, MPC946 Datasheet

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MPC946

Manufacturer Part Number
MPC946
Description
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low Voltage 1:10 CMOS
Clock Driver
outputs can be configured into a standard fanout buffer or into 1X and
1/2X combinations. The ten outputs were designed and optimized to drive
50Ω series or parallel terminated transmission lines. With output to output
skews of 350ps the MPC946 is an ideal clock distribution chip for
synchronous systems which need a tight level of skew from a large
number of outputs. For a similar product with more outputs consult the
MPC949 data sheet.
the LOW logic states, the output buffers of the MPC946 are ideal for
driving series terminated transmission lines. More specifically each of the
10 MPC946 outputs can drive two series terminated transmission lines.
With this capability, the MPC946 has an effective fanout of 1:20 in
applications using point–to–point distribution schemes.
a 1X source. The design is fully static, the signals are generated and
retimed inside the chip to ensure minimal skew between the 1X and 1/2X
signals. The device features selectability to allow the user to select the
ratio of 1X outputs to 1/2X outputs.
provide redundant clock sources or the addition of a test clock into the system design. With the TCLK_Sel input pulled HIGH the
TCLK1 input is selected.
Dsel pins will select the 1X output. The MR/Tristate input will reset the internal flip flops and tristate the outputs when it is forced
HIGH.
cost of the device. The 32–lead TQFP has a 7x7mm body size with a conservative 0.8mm pin spacing.
Pentium is a trademark of Intel Corporation.
10/96
Motorola, Inc. 1996
Clock Distribution for Pentium
2 Selectable LVCMOS/LVTTL Clock Inputs
350ps Output to Output Skew
Drives up to 20 Independent Clock Lines
Maximum Input/Output Frequency of 150MHz
Tristatable Outputs
32–Lead TQFP Packaging
3.3V VCC Supply
The MPC946 is a low voltage CMOS, 10 output clock buffer. The 10
With an output impedance of approximately 7Ω, in both the HIGH and
The MPC946 has the capability of generating 1X and 1/2X signals from
Two independent LVCMOS/LVTTL compatible clock inputs are available. Designers can take advantage of this feature to
All of the control inputs are LVCMOS/LVTTL compatible. The Dsel pins choose between 1X and 1/2X outputs. A LOW on the
The MPC946 is fully 3.3V compatible. The 32–lead TQFP package was chosen to optimize performance, board space and
Systems with PCI
1
REV 1
1:10 CMOS CLOCK DRIVER
LOW VOLTAGE
MPC946
TQFP PACKAGE
CASE 873A–02
FA SUFFIX

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MPC946 Summary of contents

Page 1

... Dsel pins will select the 1X output. The MR/Tristate input will reset the internal flip flops and tristate the outputs when it is forced HIGH. The MPC946 is fully 3.3V compatible. The 32–lead TQFP package was chosen to optimize performance, board space and cost of the device. The 32–lead TQFP has a 7x7mm body size with a conservative 0.8mm pin spacing. ...

Page 2

... Pull Down) TCLK_Sel (Int Pull Up) TCLK0 (Int Pull Up) TCLK1 (Int Pull Down) Dsela (Int Pull Down) Dselb (Int Pull Down) Dselc (Int Pull Down) MR/OE Pinout: 32–Lead TQFP (Top View VCCa 25 Qa2 26 GNDa 27 Qa1 28 MPC946 VCCa 29 Qa0 30 GNDa 31 32 MR/ MOTOROLA LOGIC DIAGRAM ...

Page 3

... Maximum Quiescent Supply Current C IN Input Capacitance C pd Power Dissipation Capacitance 1. The MPC946 outputs can drive series or parallel terminated 50Ω (or 50Ω /2) transmission lines on the incident edge (see Applications Info section current is a result of internal pull–up/pull–down resistors. AC CHARACTERISTICS ( 3.3V 0.3V) Symbol ...

Page 4

... VCC/2. This technique draws a fairly high level of DC current and thus only a single terminated line can be driven by each output of the MPC946 clock driver. For the series terminated case however there current draw, thus the outputs can drive multiple series terminated lines. ...

Page 5

... F D É É SECTION AE– MPC946 DETAIL Y NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE –AB– IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS – ...

Page 6

... JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 81–3–3521–8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 *MPC946/D* 6 MPC946/D TIMING SOLUTIONS BR1333 — Rev 6 ...

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