BT8370KPF

Manufacturer Part NumberBT8370KPF
DescriptionFully integrated T1/E1 framer and line interface
ManufacturerConexant Systems, Inc.
BT8370KPF datasheet
 


Specifications of BT8370KPF

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Bt8370/8375/8376
Fully Integrated T1/E1 Framer and Line Interface
Transmit FIFO Near Empty—Indicates that the data link has emptied the transmit FIFO to
TNEAR1
below the near empty threshold specified in FEC[5:0]. After sending the byte that occupied the
near empty FIFO threshold level, TNEAR1 goes active-high, which generates a TNEAR
interrupt. The processor must write data to TDL1 to fill the transmit FIFO beyond the near
empty threshold. This is necessary to clear TNEAR1 status, and enable the next TNEAR
interrupt event.
Transmit FIFO Full—Indicates that the processor has completely filled 64 byte locations in
TFULL1
transmit FIFO. While TFULL1 remains active, any subsequent processor-writes to TDL1 are
ignored. If the processor inadvertently writes to TDL1 while TFULL1 is active, the processor
must allow FIFO to become completely empty without writing to TDL1_EOM. This is
necessary to force the transmitter to send an abort character.
0AF— DL2 Time Slot Enable (DL2_TS)
Not available in Bt8376 device.
NOTE:
7
6
5
DL2_TS[7]
DL2_TS[6]
DL2_TS[5]
Unchannelized—Test mode only, all time slots selected. Zero for normal operation.
DL2_TS[7]
Frame Select—Transmit and receive data link 2 operates on data only during specified T1/E1
DL2_TS[6, 5]
frames. Frame select options give the processor access to different types of data link channels
and overhead channels. Overhead bit insertion is performed after TDL1, so internal transmitter
overhead insertion must be bypassed [TFRM; addr 072] before the processor-supplied
overhead can be output from TDL2.
Time Slot Word Enable—Transmit and receive data link 2 operates on data only during the
DL2_TS[4:0]
specified time slot. During T1 mode, selecting time slot 0 enables data link operation on the
F-bit positions.0B0—DL2 Bit Enable (DL2_BIT)
DL2_TS[4:0]
N8370DSE
0 = FIFO depth is below the near empty level
1 = FIFO has been emptied past the near empty level
0 = FIFO is less than full
1 = FIFO has been completely filled
4
3
DL2_TS[4]
DL2_TS[3]
00 = all frames
01 = even frames only
10 = odd frames only
11 = reserved
Time Slot Enable
00000
F-bit (T1) or TS0 (E1)
00001
TS1
|
|
11110
TS30
11111
TS31
Conexant
3.16 Data Link Registers
2
1
0
DL2_TS[2]
DL2_TS[1]
DL2_TS[0]
3-101