BT8370KPF

Manufacturer Part NumberBT8370KPF
DescriptionFully integrated T1/E1 framer and line interface
ManufacturerConexant Systems, Inc.
BT8370KPF datasheet
 

Specifications of BT8370KPF

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PrevNext
Bt8370/8375/8376
Fully Integrated T1/E1 Framer and Line Interface
0B4— RDL #2 Status (RDL2_STAT)
Not available in Bt8376 device.
NOTE:
7
6
5
In-Progress Receive Message—The real-time status of the receive message sequencer is
RMSG2
provided mostly for processor-polled applications. During HDLC modes, RMSG2 is high for
the interval between opening and closing FLAG characters to indicate the receiver is actively
filling FIFO locations (in which case RSTAT2 is also held high). RMSG2 is low while the
channel receives FLAG or abort characters. During unformatted modes, RMSG2 is
continuously high.
Next, FIFO Read Equals Message Status—For non-empty FIFO conditions (RMPTY2=0),
RSTAT2
RSTAT2 indicates that the next byte read from RDL2 is WORD0 message status or WORD1
message data. RSTAT2 equals 0 if the FIFO is empty, with no message in-progress. The
processor polls RSTAT2 before reading RDL2 to determine how to interpret the RDL2 read
byte value, or checks RSTAT2 in response to an RMSG interrupt [ISR1; addr 00A].
Receive FIFO Empty—Indicates no data or status bytes are present in receive data link FIFO.
RMPTY2
Receive FIFO Near Full—Indicates the data link has filled the receive FIFO to the near full
RNEAR2
threshold level specified in FFC[5:0]. Upon reaching the near full level, the receiver updates
the message status byte [WORD0] placed on top of the FIFO and reports the current
in-progress message with a Partial end of message status. The processor must read those filled
FIFO locations to clear RNEAR2 status indicator and enable the next RNEAR interrupt.
Receive FIFO Full—Indicates the data link has completely filled 64 byte locations in the receive
RFULL2
FIFO. In all cases, RFULL2 is an error indicating the processor did not keep pace with the
receiver, and one or more received messages were discarded after the FIFO became full. The
FIFO can still contain one or more Good received messages, and the processor can still process
all receive FIFO contents as usual. However, any message that was in progress when FIFO
reached full is discarded and reported with Partial end of message status and a 0 byte count
(which distinguishes a full end of message status from a normal abort or error message status).
N8370DSE
4
3
RMSG2
RSTAT2
0 = channel idle
1 = channel actively filling FIFO
0 = RDL2 byte equals Message Data (or empty FIFO, if RMTPY2=1)
1 = RDL2 byte equals Message Status (if RMPTY2=0)
0 = FIFO contains data or status as indicated by RSTAT2
1 = FIFO empty
0 = FIFO depth is below the near full level
1 = FIFO has been filled to the near full level
0 = FIFO is less than full
1 = FIFO has been completely filled
Conexant
3.16 Data Link Registers
2
1
0
RMPTY2
RNEAR2
RFULL2
3-107