2.0 Circuit Description
The Transmit Data Link FIFO #1 [TDL1; addr 0AD] is 64 bytes, and very
versatile. It can be used as a single-byte transmit buffer or in any number of bytes,
up to a maximum of 64. As a single-byte FIFO, the Transmit FIFO Empty Status
(TMPTY1) in TDL #1 Status [TDL1_STAT; addr 0AE] and Transmit FIFO
Empty Interrupt (TEMPTY) in Data Link 1 Interrupt Status (ISR2; addr 009] can
be used for byte-by-byte transmissions.
Using the Transmit Data FIFO, an entire block of data can be transmitted with
very little microprocessor-interrupt overhead. Block transfers to the FIFO can be
controlled by the Near Empty Threshold in the FIFO Empty Control register
[TDL1_FEC; addr 0AB]. The Near Empty Threshold is a user-programmable
value between 0 and 63 that represents the minimum number of bytes that can
remain in the transmit FIFO before near empty is declared. Once the threshold is
set, the Near Empty Status (TNEAR1) in TDL #1 Status [TDL1_STAT;
addr 0AE] is asserted whenever the Near Empty Threshold is reached. An
interrupt, TNEAR in the Data Link 1 Interrupt Status register [ISR2; addr 009], is
also available to mark this event.
Once an entire message is written into the transmit FIFO or circular buffer, the
processor must indicate the end of message by writing any value to the TDL #1
End of Message (EOM) Control [TDL1_EOM; addr 0AC]. In FCS mode, the
EOM indicates that the FCS is to be calculated and transmitted following the last
byte in the FIFO; in the Circular Buffer mode, the EOM indicates the end of the
transmit circular buffer.
Fully Integrated T1/E1 Framer and Line Interface