2.0 Circuit Description
2.8.4 Overhead Pattern Generator
The transmit overhead generation circuitry provides the ability to insert all of the
overhead associated with the Primary Rate Channel. The following types of
overhead pattern generation are supported: Framing patterns, Alarm patterns,
Cyclic Redundancy Check (CRC), and Far-End Block Error (FEBE).
184.108.40.206 Framing Pattern
The framing pattern generation circuitry inserts the following patterns into the
data stream: the 2-bit terminal framing (Ft) pattern, the 6-bit signaling frame (Fs)
pattern, the 6-bit FPS pattern, the 8-bit FAS/NFAS pattern, and the 6-bit MFAS
The Ft pattern in SF, SLC-96, and T1DM is inserted into the transmit data
stream by enabling the INS_FBIT in the Transmit Frame Format register [TFRM;
addr 072]. The Fs pattern in SF is inserted by enabling the INS_MF bit. The FPS
pattern in ESF and the FAS/NFAS pattern in E1 mode are inserted by enabling the
INS_FBIT bit. The MFAS pattern is inserted by enabling the INS_MF bit.
220.127.116.11 Alarm Generator
The Transmit Alarm Generation circuitry generates Alarm Indication Signal
(AIS) and Remote Alarm Indication (RAI/Yellow Alarm).
AIS is defined as an unframed all-1s pattern and is normally transmitted when the
data source is lost. AIS transmission can be enabled as follows:
• Automatically upon detection of transmit loss of clock
• Automatically upon loss of received signal or loss of receive clock
Typical applications require transmission of AIS toward the line when DTE
transmit data or clock is not present. In most applications, DTE data and clock are
isolated from the transmitter, requiring manual AIS transmission under software
control. Manual insertion of AIS is controlled by the TAIS bit in the Transmit
Alarm Signal Configuration register [TALM; addr 075]. Setting this bit
overwrites the currently transmitted data with the AIS pattern. If AISCLK
[TLIU_CR; addr 068] is also set, AIS is transmitted using AIS Clock Input
(ACKI); otherwise it uses the clock present at TCKI MUX output [CMUX; addr
Automatic transmission of AIS can be controlled by detection of transmit loss
of clock [TLOC; addr 048]. This mode is enabled by setting AISCLK and
providing an alternate transmit line rate clock on the ACKI clock input pin.
By setting AUTO_AIS in the TALM register, automatic transmission of AIS
can also be controlled by detection of Receiver Loss of Signal [RLOS; addr 047]
or Receiver Loss of Clock [RLOC; addr 047], depending on whether an analog or
digital line interface option [RDIGI; addr 020] is used. This mode is typically
used to transmit AIS (keep-alive) during line loopback if the received signal is
lost. Setting AUTO_AIS simultaneously with setting LLOOP [LOOP; addr 014]
enables this operation.
Fully Integrated T1/E1 Framer and Line Interface