MC68HC705C8ACS

Manufacturer Part NumberMC68HC705C8ACS
ManufacturerFreescale Semiconductor, Inc
MC68HC705C8ACS datasheet
 


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Freescale Semiconductor, Inc.
Capture/Compare Timer
8.4.5 Input Capture Registers
When a selected edge occurs on the TCAP pin, the current high and low
bytes of the 16-bit counter are latched into the read-only input capture
registers (ICRH and ICRL) shown in
reading ICRL inhibits further captures until ICRL is read. Reading ICRL
after reading the timer status register clears the input capture flag (ICF).
Writing to the input capture registers has no effect.
Register Name and Address: Input Capture Register High — $0014
Read:
Write:
Reset:
Register Name and Address: Input Capture Register Low — $0015
Read:
Write:
Reset:
NOTE:
To prevent interrupts from occurring between readings of ICRH and
ICRL, set the interrupt mask (I bit) in the condition code register before
reading ICRH and clear the mask after reading ICRL.
Technical Data
100
Bit 7
6
5
Bit 15
Bit 14
Bit 13
Bit 12
Unaffected by reset
Bit 7
Bit 6
Bit 5
Bit 4
Unaffected by reset
= Unimplemented
Figure 8-11. Input Capture Registers (ICRH and ICRL)
Capture/Compare Timer
For More Information On This Product,
Go to: www.freescale.com
Figure
8-11. Reading ICRH before
4
3
2
1
Bit 11
Bit 10
Bit 9
Bit 3
Bit 2
Bit 1
MC68HC705C8A — Rev. 3
Bit 0
Bit 8
Bit 0