MC68HC705C8ACS

Manufacturer Part NumberMC68HC705C8ACS
ManufacturerFreescale Semiconductor, Inc
MC68HC705C8ACS datasheet
 


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Page 116/222:

Control Registers

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Freescale Semiconductor, Inc.
EPROM/OTPROM (PROM)
9.5 Control Registers
This subsection describes the three registers that control memory
configuration, PROM security, and IRQ edge or level sensitivity; port B
pullups; and non-programmable COP enable/disable.
9.5.1 Option Register
The option register shown in
sensitivity, enable the PROM security, and select the memory
configuration.
Address:
Read:
Write:
Reset:
RAM0 — Random-Access Memory Control Bit 0
RAM1 — Random-Access Memory Control Bit 1
Technical Data
116
Figure 9-4
$1FDF
Bit 7
6
5
RAM0
RAM1
0
0
0
0
*
Implemented as an EPROM cell
= Unimplemented
Figure 9-4. Option Register (Option)
1 = Maps 32 bytes of RAM into page zero starting at address
$0030. Addresses from $0020 to $002F are reserved. This bit
can be read or written at any time, allowing memory
configuration to be changed during program execution.
0 = Provides 48 bytes of PROM at location $0020–$005F.
1 = Maps 96 bytes of RAM into page one starting at address $0100.
This bit can be read or written at any time, allowing memory
configuration to be changed during program execution.
0 = Provides 96 bytes of PROM at location $0100.
EPROM/OTPROM (PROM)
For More Information On This Product,
Go to: www.freescale.com
is used to select the IRQ
4
3
2
1
*
0
SEC
IRQ
*
0
U
1
U = Unaffected
MC68HC705C8A — Rev. 3
Bit 0
0
0