HY57V641620HGTP-P Hynix Semiconductor, HY57V641620HGTP-P Datasheet

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HY57V641620HGTP-P

Manufacturer Part Number
HY57V641620HGTP-P
Description
Manufacturer
Hynix Semiconductor
Datasheet
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use
of circuits described. No patent licenses are implied.
Rev. 0.9 / Mar. 2004
DESCRIPTION
The Hynix HY57V641620HG(L)TP is a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the main memory applications
which require large memory density and high bandwidth. HY57V641620HG(L)TP is organized as 4banks of 1,048,576x16.
HY57V641620HG(L)TP is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are
synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input
and output voltage levels are compatible with LVTTL.
Programmable options include the length of pipeline (Read latency of 2 or 3), the number of consecutive read or write cycles initiated
by a single control command (Burst length of 1,2,4,8 or Full page), and the burst count sequence(sequential or interleave). A burst of
read or write cycles in progress can be terminated by a burst terminate command or can be interrupted and replaced by a new burst
read or write command on any cycle. (This pipelined design is not restricted by a `2N` rule.)
FEATURES
ORDERING INFORMATION
Note : VDD(Min) of HY57V641620HG(L)TP-5/55/6 is 3.135V
HY57V641620HGLTP-5/55/6/7
HY57V641620HGTP-5/55/6/7
Single 3.3±0.3V power supply
All device pins are compatible with LVTTL interface
JEDEC standard 400mil 54pin TSOP-II with 0.8mm of pin
pitch
All inputs and outputs referenced to positive edge of system
clock
Data mask function by UDQM or LDQM
Internal four banks operation
HY57V641620HGLTP-H
HY57V641620HGLTP-K
HY57V641620HGLTP-8
HY57V641620HGLTP-P
HY57V641620HGLTP-S
HY57V641620HGTP-K
HY57V641620HGTP-H
HY57V641620HGTP-P
HY57V641620HGTP-S
HY57V641620HGTP-8
Part No.
Note)
200/183/166/143MHz
200/183/166/143MHz
Clock Frequency
133MHz
133MHz
125MHz
100MHz
100MHz
133MHz
133MHz
125MHz
100MHz
100MHz
Power
Normal
power
Low
4 Banks x 1M x 16Bit Synchronous DRAM
4Banks x 1Mbits x16
Auto refresh and self refresh
4096 refresh cycles / 64ms
Programmable Burst Length and Burst Type
Programmable CAS Latency ; 2, 3 Clocks
Package Type: 54Pin TSOPII(Lead Free)
- 1, 2, 4, 8 or Full page for Sequential Burst
- 1, 2, 4 or 8 for Interleave Burst
Organization
HY57V641620HG(L)TP
Interface
LVTTL
400mil 54pin TSOP II
(Lead or Lead Free)
Package
1

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HY57V641620HGTP-P Summary of contents

Page 1

... Data mask function by UDQM or LDQM • Internal four banks operation ORDERING INFORMATION Part No. HY57V641620HGTP-5/55/6/7 HY57V641620HGTP-K HY57V641620HGTP-H HY57V641620HGTP-8 HY57V641620HGTP-P HY57V641620HGTP-S HY57V641620HGLTP-5/55/6/7 HY57V641620HGLTP-K HY57V641620HGLTP-H HY57V641620HGLTP-8 HY57V641620HGLTP-P HY57V641620HGLTP-S Note : VDD(Min) of HY57V641620HG(L)TP-5/55/6 is 3.135V This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described ...

Page 2

PIN CONFIGURATION PIN DESCRIPTION PIN PIN NAME CLK Clock CKE Clock Enable CS Chip Select BA0,BA1 Bank Address A0 ~ A11 Address Row Address Strobe, RAS, CAS, WE Column Address Strobe, Write Enable LDQM, UDQM Data Input/Output Mask DQ0 ~ ...

Page 3

FUNCTIONAL BLOCK DIAGRAM 1Mbit x 4banks x 16 I/O Synchronous DRAM Self refresh logic & timer CLK Row active CKE CS RAS CAS refresh WE Column Active UDQM LDQM Bank Select A0 Address Registers A1 A11 BA0 BA1 Mode Registers ...

Page 4

ABSOLUTE MAXIMUM RATINGS Parameter Ambient Temperature Storage Temperature Voltage on Any Pin relative Voltage on V relative Short Circuit Output Current Power Dissipation Soldering Temperature ⋅ Time Note : Operation at above absolute ...

Page 5

CAPACITANCE (TA=25 °C , f=1MHz) Parameter Input capacitance CLK A0 ~ A11, BA0, BA1, CKE, CS, RAS, CAS, WE, UDQM, LDQM Data input / output capacitance DQ0 ~ DQ15 OUTPUT LOAD CIRCUIT Output DC Output Load Circuit DC CHARACTERISTICS I ...

Page 6

... Self Refresh Current I DD6 Note : 1.I and I depend on output loading and cycle rates. Specified values are measured with the output open DD1 DD4 2.Min. of tRRC (Refresh RAS cycle time) is shown at AC CHARACTERISTICS II 3.HY57V641620HGTP-6/7/K/H/P/S 4.HY57V641620HGLTP-6/7/K/H/P/S Rev. 0.9 / Mar. 2004 ± Note5 (TA ° =3.3 0. =0V) ...

Page 7

AC CHARACTERISTICS I (AC operating conditions unless otherwise noted) Parameter Symbol Min CAS Latency = tCK3 5 3 System clock cycle time CAS Latency = tCK2 10 2 Clock high pulse width tCHW 1.75 Clock low pulse width tCLW 1.75 ...

Page 8

AC CHARACTERISTICS II -5 Symbo Parameter l Min t Operation RC 55 RAS Cycle Time t Auto Refresh 60 RRC t RAS to CAS Delay RCD 15 t RAS Active Time RAS 38.5 100K 38.5 100K t RAS Precharge Time ...

Page 9

DEVICE OPERATING OPTION TABLE HY57V641620HG(L)TP-5 CAS Latency 200MHz(5ns) 3CLKs 183MHz(5.5ns) 3CLKs 166MHz(6ns) 3CLKs HY57V641620HG(L)TP-55 CAS Latency 3CLKs 183MHz(5.5ns) 166MHz(6ns) 3CLKs 143MHz(7ns) 3CLKs HY57V641620HG(L)TP-6 CAS Latency 166MHz(6ns) 3CLKs 143MHz(7ns) 3CLKs 133MHz(7.5ns) 2CLKs HY57V641620HG(L)TP-7 CAS Latency 143MHz(7ns) 3CLKs 133MHz(7.5ns) 3CLKs 100MHz(10ns) 2CLKs ...

Page 10

HY57V641620HG(L)TP-8 CAS Latency 125MHz(8ns) 3CLKs 100MHz(10ns) 2CLKs 83MHz(12ns) 3CLKs HY57V641620HG(L)TP-P CAS Latency 100MHz(10ns) 2CLKs 83MHz(12ns) 2CLKs 66MHz(15ns) 2CLKs HY57V641620HG(L)TP-S CAS Latency 100MHz(10ns) 3CLKs 83MHz(12ns) 2CLKs 66MHz(15ns) 2CLKs Rev. 0.9 / Mar. 2004 tRCD tRAS tRC 3CLKs 7CLKs 10CLKs 2CLKs 5CLKs ...

Page 11

COMMAND TRUTH TABLE Command CKEn-1 Mode Register Set H No Operation H Bank Active H Read H Read with Autoprecharge Write H Write with Autoprecharge Precharge All Banks H Precharge selected Bank Burst Stop H DQM H Auto Refresh H ...

Page 12

PACKAGE INFORMATION 400mil 54pin Thin Small Outline Package 22.327(0.8790) 22.149(0.8720) 0.150(0.0059) 0.050(0.0020) 0.400(0.016) 0.80(0.0315)BSC 0.300(0.012) Rev. 0.9 / Mar. 2004 HY57V641620HG(L)TP UNIT : mm(inch) 11.938(0.4700) 11.735(0.4620) 10.262(0.4040) 10.058(0.3960) 5deg 0.210(0.0083) 0.597(0.0235) 0deg 0.406(0.0160) 0.120(0.0047) 1.194(0.0470) 0.991(0.0390) 12 ...

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