HY5DU283222F-36 Hynix Semiconductor, HY5DU283222F-36 Datasheet
HY5DU283222F-36
Related parts for HY5DU283222F-36
HY5DU283222F-36 Summary of contents
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... GDDR SDRAM This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any respon- sibility for use of circuits described. No patent licenses are implied. Rev. 1.2/Sep. 02 HY5DU283222F HY5DU283222F 1 ...
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... Rvision History Revision No. 0.4 1) Part Number changed from HY5DU283222F to HY6U22F 1) tAC/tDQSCK, tRCD/tRP parameters each speed changed as the followings a) tAC : changed from 0.7ns to 0.9ns at 3.3/4/4.5ns 0.5 b) tDQSCK : changed from 0.6ns to 0.7ns at 3.3/4/4.5ns c) tRCD/tRP : changed from 5clk to 6clk at 3.3ns and 4clk to 5clk at 4/4.5ns ...
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... ORDERING INFORMATION Part No. Power Supply HY5DU283222F- HY5DU283222F-28 DDQ HY5DU283222F-33 V HY5DU283222F- HY5DU283222F-4 DDQ HY5DU283222F-5 Rev. 1.2/Sep. 02 power supply • All addresses and control inputs except Data, Data strobes and Data masks latched on the rising edges of the clock power supply • ...
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... VSSQ Termal Termal Termal VSSQ VSS VSS VSS VDD VSS A10 VDD VDD NC BA1 A2 A11 A9 BA0 ROW and COLUMN ADDRESS TABLE Items HY5DU283222F DQ29 DQ28 VSSQ DM3 DQS3 DQ27 DQ30 VDDQ NC VDDQ VSSQ DQ26 DQ25 VSSQ VSSQ VSSQ VSS VDD VDDQ ...
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... DQ0-Q7; DQS1 corresponds to the data on DQ8-Q15; DQS2 corresponds to the data on DQ16-Q23; DQS3 corresponds to the data on DQ24-Q31 Data input / output pin : Data Bus Power supply for internal circuits and input buffers. Power supply for output buffers for noise immunity. Reference voltage for inputs for SSTL interface. No connection. HY5DU283222F 5 ...
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... Rev. 1.2/Sep. 02 Write Data Register 2-bit Prefetch Unit 64 Bank 1Mx32/Bank0 Control 1Mx32 /Bank1 1Mx32 /Bank2 1Mx32 /Bank3 Mode Row Register Decoder Column Decoder Column Address Counter CLK_DLL CLK, DLL /CLK Block Mode Register HY5DU283222F DQ[0:31] DQS(0~3) Data Strobe Transmitter Data Strobe DS Receiver 6 ...
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... If A8/AP is High when Precharge command being issued, BA0/BA1 are ignored and all banks are selected to be precharged. Rev. 1.2/Sep. 02 CKEn CS RAS HY5DU283222F A8/ CAS WE ADDR code code Note 1 1,4 X ...
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... Write Mask command masks burst write data with reference to DQS(0~3) and it is not related with read data. 2. DM0 corresponds to the data on DQ0-Q7; DM1 corresponds to the data on DQ8-Q15; DM2 corresponds to the data on DQ16-Q23; DM3 corresponds to the data on DQ24-Q31. Rev. 1.2/Sep. 02 /CS, /RAS, CKEn /CAS, / HY5DU283222F A8/ DM(0~3) BA ADDR Note ...
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... BA OPCODE BA, CA, AP READ/READAP L L BA, CA, AP WRITE/WRITEAP HY5DU283222F Command Action DSEL NOP or power down NOP NOP or power down BST ILLEGAL ILLEGAL ILLEGAL ACT Row Activation PRE/PALL NOP AREF/SREF Auto Refresh or Self Refresh MRS Mode Register Set DSEL NOP NOP NOP BST ILLEGAL ...
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... BA, CA, AP READ/READAP L L BA, CA, AP WRITE/WRITEAP OPCODE HY5DU283222F Command Action ACT ILLEGAL PRE/PALL Term burst, precharge AREF/SREF ILLEGAL MRS ILLEGAL DSEL Continue burst to end NOP Continue burst to end BST ILLEGAL ILLEGAL ILLEGAL ACT ILLEGAL PRE/PALL ILLEGAL AREF/SREF ILLEGAL MRS ILLEGAL ...
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... L BA OPCODE BA, CA, AP READ/READAP HY5DU283222F Command Action DSEL NOP - Enter ROW ACT after tRCD NOP NOP - Enter ROW ACT after tRCD BST ILLEGAL ILLEGAL ILLEGAL ACT ILLEGAL PRE/PALL ILLEGAL AREF/SREF ILLEGAL MRS ILLEGAL DSEL NOP - Enter ROW ACT after tWR NOP ...
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... BA, CA, AP READ/READAP L L BA, CA, AP WRITE/WRITEAP OPCODE HY5DU283222F Command Action ILLEGAL ACT ILLEGAL PRE/PALL ILLEGAL AREF/SREF ILLEGAL MRS ILLEGAL DSEL NOP - Enter IDLE after tMRD NOP NOP - Enter IDLE after tMRD BST ILLEGAL ILLEGAL ILLEGAL ACT ILLEGAL PRE/PALL ILLEGAL AREF/SREF ...
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... HY5DU283222F /ADD Action X INVALID X Exit self refresh, enter idle after tSREX X Exit self refresh, enter idle after tSREX X ILLEGAL X ILLEGAL X ILLEGAL X NOP, continue self refresh X INVALID X Exit power down, enter idle X Exit power down, enter idle X ILLEGAL X ILLEGAL X ILLEGAL X NOP, continue power down mode ...
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... IDLE SREX PDEN PDEX AREF ACT POWER DOWN PDEN PDEX BANK ACTIVE WRITE READ WITH WITH AUTOPRE- AUTOPRE- CHARGE CHARGE WRITE PRE- CHARGE POWER-UP POWER APPLIED HY5DU283222F SELF REFRESH AUTO REFRESH BST READ READAP READ WRITEAP PRE(PALL) Command Input Automatic Sequence 14 ...
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... V in the following power up sequencing and attempt to maintain CKE at LVC- REF supply into any pin. Sequencing Voltage relationship to avoid latch-up After or with V DD After or with V DDQ After or with V DDQ HY5DU283222F , then and finally DDQ . Except for TT < 0.3V DD < 0.3V DDQ < ...
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... CODE CODE CODE tRP tMRD tMRD EMRS Set MRS Set Precharge All Precharge All Reset DLL (with A8=H) * 200 cycle(tXSRD are required (for DLL locking) before Read Command HY5DU283222F AREF MRS ACT CODE CODE CODE CODE CODE CODE tRP tRFC tMRD ...
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... CAS Latency BT A7 Test Mode 0 Normal Vendor 1 test mode A8 DLL Reset Yes CAS Latency Reserved Reserved Reserved Reserved Reserved Reserved HY5DU283222F Burst Length Burst Length Sequential Reserved Reserved Reserved Reserved Reserved A3 Burst Type 0 Sequential 1 Interleave Interleave Reserved Reserved Reserved Reserved Reserved ...
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... A3. The ordering of accesses within a burst is determined by the burst length, the burst type and the starting column address, as shown in Burst Definitionon Table Rev. 1.2/Sep. 02 Sequential XX0 0, 1 XX1 1, 0 X00 X01 X10 X11 000 001 010 011 100 101 110 111 HY5DU283222F Interleave ...
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... This device supports both Half strength driver and Matched impedance driver, intended for lighter load and/or point-to- point environments. Half strength driver is to define about 50% of Full drive strength which is specified to be SSTL_2, Class II, and Matched impedance driver, about 30% of Full drive strength. Rev. 1.2/Sep. 02 HY5DU283222F 19 ...
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... RFU* BA0 MRS Type 0 MRS 1 EMRS * All bits in RFU address fields must be programmed to Zero, all other states are reserved for future usage. Rev. 1.2/Sep RFU HY5DU283222F DLL A0 DLL enable 0 Enable 1 Diable Output Driver Impedance Control RFU* Half RFU* Matched Impedance (Weak) 20 ...
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... DC level of the same. DDQ ± the DC value. o (TA Voltage referenced to V Symbol Min 0. =0V HY5DU283222F Rating -55 ~ 125 -0.5 ~ 3.6 -0.5 ~ 3.6 -0 260 ⋅ 0V) SS Max Unit 2.5 2.625 V 2.9 3.05 2.5 2.625 V 2.9 3. ...
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... I =0mA RC OL (max), t =min (min), /CS ≥ V (min 100 (max), t =min (min), /CS ≥ V (min 160 CL=4 630 (min), I =0mA CK OL CL=3 630 (min), RFC 300 3 HY5DU283222F = 0V) SS Speed 300 280 280 280 260 100 160 130 130 130 100 600 470 ...
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... DC level of the same. DDQ o (TA Voltage referenced to VSS = 0V) Value V DDQ V DDQ V + 0.45 REF V REF V REF V REF V REF HY5DU283222F = 0V) SS Max Unit Note 350MHz 350MHz REF V 375MHz only V - 0.7 V 375MHz only REF V + 0.6 V DDQ 0.5*V +0.2 V DDQ Unit Unit x 0 ...
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... CL t -0.9 0 DQSCK -0.7 0.7 t DQSQ - 0.4 tHPmin -tQHS tCH min t QHS - 0 DQSH 0.4 0.6 t DQSL 0.4 0.6 t DQSS 0.75 1. RPRE 0.7 1.1 HY5DU283222F 28 33 Min Max Min Max 61.6 - 62 120K 42.9 120K 2 0.45 ...
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... Max Min t 0.4 0.6 0.4 RPST WPRES t WPREH 1.5 - 1.5 t WPST 0.4 0.6 0.4 t MRD 200 - 200 XSC 2tCK 2tCK t - PDEX + tIS + tIS t REFI - 7.8 - HY5DU283222F 28 33 Unit Note Max Min Max CK 0.6 0 0.6 0.4 0 200 - 2tCK tIS us 7 ...
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... CH 0.45 0.55 t 0.45 0. -0.9 0 DQSCK -0.7 0.7 t DQSQ - 0.4 tHPmin -tQHS tCH min t QHS - 0 DQSH 0.4 0.6 t DQSL 0.4 0.6 t DQSS 0.75 1. 0.4 - HY5DU283222F 4 5 Min Max Min Max 120K 40 120K 0.45 0.55 0.45 0.55 0.45 ...
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... RPST t WPRES WPREH 1.5 - 1.5 t WPST 0.4 0.6 0 MRD t XSC 200 - 200 1tCK 1tCK t - PDEX + tIS + tIS t - 7.8 - REFI HY5DU283222F 4 5 Unit Note Max Min Max CK 1.1 0.8 1.1 CK 0.6 0 0.6 0.4 0 200 - 1tCK tIS us 7 ...
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... AC CHARACTERISTICS - II Frequency CL tRC 375MHz (2.6ns 350MHz (2.8ns 300MHz (3.3ns 275MHz (3.6ns 250MHz (4.0ns 200MHz (5.0ns Rev. 1.2/Sep. 02 tRFC tRAS tRCDRD HY5DU283222F tRCDWR tRP tDAL Unit tCK tCK tCK tCK tCK tCK 28 ...
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... Pins not under test are tied to GND. 3. These values are guaranteed by design and are tested on a sample basis only. OUTPUT LOAD CIRCUIT Output Rev. 1.2/Sep. 02 Pin CK, /CK All other input-only pins DQ, DQS /2, V peak-to-peak = 0.2V O DDQ =50Ω T Zo=50Ω V REF C =30pF L HY5DU283222F Symbol Min Max Unit ...
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... Fine-pitch Ball Grid Array 12mm± 0.1 8.8mm [ Ball Location ] Ball existing Optional (Vss thermal ball) Rev. 1.2/Sep. 02 1.2 mm max 0.76mm ± 0.05 12mm± 0.1 0.35mm ± 0.05 0.8mm Detailed “A” 8.8mm 0.12mm HY5DU283222F Detailed “A” 0.5mm Diameter 0.55Max 0.45Min 30 ...