PA28F400B5B60 Intel Corporation, PA28F400B5B60 Datasheet
PA28F400B5B60
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PA28F400B5B60 Summary of contents
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SMART 5 BOOT BLOCK FLASH MEMORY FAMILY 28F200B5, 28F400B5, 28F800B5, 28F004B5 n SmartVoltage Technology Smart 5 Flash Reads Writes Increased Programming Throughput Very High-Performance Read 2-, 4-Mbit: ...
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... Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from: Intel Corporation P.O. Box 5937 Denver, CO 80217-9808 or call 1-800-548-4725 or visit Intel’s website at http://www.intel.com COPYRIGHT © INTEL CORPORATION 1997, 1998 *Third-party brands and names are the property of their respective owners. CG-041493 ...
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INTRODUCTION .............................................5 1.1 New Features in the Smart 5 Memory Products......................................................5 1.2 Product Overview.........................................5 2.0 PRODUCT DESCRIPTION..............................6 2.1 Pin Descriptions ...........................................6 2.2 Pinouts.........................................................8 2.3 Memory Blocking Organization...................10 2.3.1 One 16-KB Boot Block.........................10 2.3.2 Two 8-KB Parameter Blocks................10 2.3.3 Main ...
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SMART 5 BOOT BLOCK MEMORY FAMILY REVISION HISTORY Number -001 Original Version -002 Minor changes throughout document. Section 3.1.5 and Figure 14 redone to clarify program/erase operation abort. Information added to Table 2, Figure 1, and Section 3.3 to clarify ...
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INTRODUCTION This datasheet contains specifications for 2-, 4-, and 8-Mbit Smart 5 boot block flash memories. Section 1.0 provides a feature overview. Sections 2.0, 3.0, and 4.0 describe the product and functionality. Section 5.0 details the electrical and timing ...
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SMART 5 BOOT BLOCK MEMORY FAMILY SmartVoltage technology enables fast factory programming and low-power designs. Specifically designed for 5 V systems, Smart 5 components support read operations and internally CC configure to program/erase ...
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Table 2. Pin Descriptions Symbol Type ADDRESS INPUTS for memory addresses. Addresses are internally latched A –A INPUT 0 18 during a write cycle. 28F200: A[0–16], 28F400: A[0–17], 28F800: A[0–18], 28F004: A[0–18] A INPUT ADDRESS INPUT: When A 9 this ...
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SMART 5 BOOT BLOCK MEMORY FAMILY Table 2. Pin Descriptions (Continued) Symbol Type WP# INPUT WRITE PROTECT: Provides a method for unlocking the boot block with a logic level signal in a system without supply. When WP# ...
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WP# WP ...
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SMART 5 BOOT BLOCK MEMORY FAMILY WE WP# 13 ...
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BOOT BLOCK 3E000H 1E000H 3DFFFH 1DFFFH 8-Kbyte PARAMETER BLOCK 1D000H 3D000H 3CFFFH 1CFFFH 8-Kbyte PARAMETER BLOCK 1C000H 3C000H 1BFFFH 3BFFFH 96-Kbyte MAIN BLOCK 10000H 30000H 2FFFFH 0FFFFH 128-Kbyte MAIN BLOCK 00000H 20000H 1FFFFH 10000H 0FFFFH 00000H ...
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SMART 5 BOOT BLOCK MEMORY FAMILY 28F200-T 7FFFFH 3FFFFH 16-Kbyte BOOT BLOCK 7C000H 3C000H 7BFFFH 3BFFFH 8-Kbyte PARAMETER BLOCK 7A000H 3A000H 79FFFH 39FFFH 8-Kbyte PARAMETER BLOCK 78000H 38000H 77FFFH 37FFFH 96-Kbyte MAIN BLOCK 60000H 20000H 5FFFFH 1FFFFH 128-Kbyte MAIN BLOCK ...
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PRINCIPLES OF OPERATION The system processor accesses the Smart 5 boot block memories through the Command User Interface (CUI), which accepts commands written with standard microprocessor write timings and TTL-level control inputs. The flash can be switched into each ...
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SMART 5 BOOT BLOCK MEMORY FAMILY 3.1.2 OUTPUT DISABLE With OE logic-high level (V ), the device IH outputs are disabled. Output pins (if available on the device) DQ –DQ are placed in a high impedance ...
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Table 3. Bus Operations for Word-Wide Mode (BYTE Mode Notes RP# Read 1,2 Output Disable V IH Standby V IH Deep Power-Down Intelligent Identifier (Mfr.) Intelligent Identifier 4 ...
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SMART 5 BOOT BLOCK MEMORY FAMILY 3.2 Modes of Operation The flash memory has three read modes and two write modes. The read modes are read array, read identifier, and read status. The write modes are program and block erase. ...
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Issue the Clear Status Register command (50H) ...
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SMART 5 BOOT BLOCK MEMORY FAMILY To resume the erase operation, enable the chip by taking CE then issue the Erase Resume IL command, which continues the erase sequence to Table 5. Command Codes and Descriptions Code ...
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Table 5. Command Codes and Descriptions (Continued) Code Device Mode 50 Clear Status The WSM can only set the program status and erase status bits in the status Register register to “1”; it cannot clear them to “0.” The status ...
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SMART 5 BOOT BLOCK MEMORY FAMILY Table 7. Status Register Bit Definition WSMS ESS SR.7 WRITE STATE MACHINE STATUS 1 = Ready 0 = Busy SR.6 = ERASE-SUSPEND STATUS (ESS Erase Suspended 0 = ...
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Start Write 40H, Word/Byte Address Write Word/Byte Data/Address Read Status Register NO SR YES Full Status Check if Desired Word/Byte Program Complete FULL STATUS CHECK PROCEDURE Read Status Register Data (See Above Range ...
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SMART 5 BOOT BLOCK MEMORY FAMILY Start Write 20H, Block Address Write D0H and Block Address Read Status Register Suspend Erase Loop NO 0 YES Suspend SR.7 = Erase 1 Full Status Check if Desired Block Erase Complete FULL STATUS ...
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Start Write B0H Write 70H Read Status Register 0 SR SR.6 = Erase Resumed 1 Write FFH Read Array Data No Done Reading Yes Write D0H Write FFH Read Array Data Erase Resumed Figure 10. Erase Suspend/Resume ...
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SMART 5 BOOT BLOCK MEMORY FAMILY 3.3 Boot Block Locking The boot block family architecture features a hardware-lockable boot block so that the kernel code for the system can be kept secure while the parameter and main blocks are programmed ...
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STANDBY POWER When CE logic-high level (V ), and the IH device is not programming or erasing, the memory enters in standby mode, which disables much of the device’s circuitry and substantially reduces power consumption. Outputs ...
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SMART 5 BOOT BLOCK MEMORY FAMILY 5.0 ELECTRICAL SPECIFICATIONS 5.1 Absolute Maximum Ratings* Commercial Operating Temperature During Read/Erase/Program...... 0 °C to +70 °C Temperature Under Bias ....... –10 °C to +80 °C Extended Operating Temperature During Read/Erase/Program.. –40 °C to ...
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Capacitance ° MHz A Symbol Parameter Note C Input Capacitance Output Capacitance 4, 7 OUT 1. Sampled, not 100% tested. 5.4 DC Characteristics—Commercial and Extended Temperature Temp Sym Parameter Note ...
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SMART 5 BOOT BLOCK MEMORY FAMILY 5.4 DC Characteristics—Commercial and Extended Temperature Temp Sym Parameter Note Typ Max Typ Max Unit I V Program Current 1,4 PP PPW (Word or Byte Mode Erase Current 1,4 PP PPE I ...
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NOTES: 1. All currents are in RMS unless otherwise noted. Typical values at V product versions (packages and speeds specified with the device deselected. If the device is read while in erase suspend mode, current draw is ...
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SMART 5 BOOT BLOCK MEMORY FAMILY DEVICE UNDER TEST NOTE: C includes jig capacitance. L Figure 13. Test Configuration Test Configuration Component Values Test Configuration C (pF ...
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AC Characteristics—Read Operations—Commercial and Extended Temperature # Sym Parameter t Read Cycle 2, 4 Mbit R1 AVAV Time 8 Mbit R2 t Address Mbit AVQV Output Delay 8 Mbit Mbit ...
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SMART 5 BOOT BLOCK MEMORY FAMILY Device and Address Selection V IH ADDRESSES (A) Address Stable CE# ( OE# ( WE# ( High ...
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AC Characteristics—Write Operations—Commercial and Extended Temperature # Sym RP# High Recovery to WE# (CE#) Going PHWL PHEL Low CE# (WE#) Setup to WE# (CE#) Going ELWL WLEL Low W3 t Write ...
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SMART 5 BOOT BLOCK MEMORY FAMILY ADDRESSES [ CE#(WE#) [E(W OE# [ WE#(CE#) [W(E High Z DATA ...
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... T = Top Boot B = Bottom Boot Voltage Options ( Architecture B = Boot Block 44-Lead PSOP 48-Lead TSOP PA28F200B5T60 E28F200B5T60 PA28F200B5B60 E28F200B5B60 PA28F200B5T80 E28F200B5T80 PA28F200B5B80 E28F200B5B80 PA28F400B5T60 E28F400B5T60 PA28F400B5B60 E28F400B5B60 PA28F400B5T80 E28F400B5T80 PA28F400B5B80 E28F400B5B80 PA28F800B5T70 E28F800B5T70 PA28F800B5B70 E28F800B5B70 PA28F800B5T90 E28F800B5T90 PA28F800B5B90 E28F800B5B90 TB28F200B5T80 TE28F200B5T80 TB28F200B5B80 TE28F200B5B80 ...
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SMART 5 BOOT BLOCK MEMORY FAMILY 7.0 ADDITIONAL INFORMATION Order Number 292194 AB-65 Migrating SmartVoltage Boot Block Flash Designs to Smart 5 Flash 2-Mbit SmartVoltage Boot Block Flash Memory Family Datasheet 290531 290530 4-Mbit SmartVoltage Boot Block Flash Memory Family ...
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WRITE STATE MACHINE: CURRENT-NEXT STATE Write State Machine Current/Next States Current SR.7 Data Read Program State When Array Setup Read (FFH) (10/40H) Read Read Program Array “1” Array Array Setup Program Setup “1” Status Program: Not “0” Status Complete Program: ...
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SMART 5 BOOT BLOCK MEMORY FAMILY PRODUCT BLOCK DIAGRAM 38 APPENDIX B ADVANCE INFORMATION 7769_01 ...