E28F016S3-120 Intel Corporation, E28F016S3-120 Datasheet

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E28F016S3-120

Manufacturer Part Number
E28F016S3-120
Description
Smart 3 FlashFile memory 16 Mbit. Access speed 120 ns
Manufacturer
Intel Corporation
Datasheet

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Intel’s byte-wide Smart 3 FlashFile™ memory family renders a variety of density offerings in the same
package. The 4-, 8-, and 16-Mbit byte-wide FlashFile memories provide high-density, low-cost, nonvolatile,
read/write storage solutions for a wide range of applications. Their symmetrically-blocked architecture, flexible
voltage, and extended cycling provide highly flexible components suitable for resident flash arrays, SIMMs,
and memory cards. Enhanced suspend capabilities provide an ideal solution for code or data storage
applications. For secure code storage applications, such as networking, where code is either directly
executed out of flash or downloaded to DRAM, the 4-, 8-, and 16-Mbit FlashFile memories offer three levels
of protection: absolute protection with V
block locking. These alternatives give designers ultimate control of their code security needs.
This family of products is manufactured on Intel’s 0.4 m ETOX™ V process technology. They come in
industry-standard packages: the 40-lead TSOP, ideal for board-constrained applications, and the rugged
44-lead PSOP. Based on the 28F008SA architecture, the byte-wide Smart 3 FlashFile memory family
enables quick and easy upgrades for designs that demand state-of-the-art technology.
December 1997
SmartVoltage Technology
High-Performance
Enhanced Data Protection Features
Enhanced Automated Suspend Options
Industry-Standard Packaging
Smart 3 Flash: 2.7 V or 3.3 V V
and 2.7 V, 3.3 V or 12 V V
120 ns Read Access Time
Absolute Protection with V
Flexible Block Locking
Block Write Lockout during Power
Transitions
Program Suspend to Read
Block Erase Suspend to Program
Block Erase Suspend to Read
40-Lead TSOP, 44-Lead PSOP
and 40 Bump BGA* CSP
SMART 3 FlashFile™ MEMORY FAMILY
Includes Commercial and Extended Temperature Specifications
28F004S3, 28F008S3, 28F016S3
4, 8, AND 16 MBIT
PP
PP
PP
= GND
BYTE-WIDE
CC
at GND, selective hardware block locking, or flexible software
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High-Density 64-Kbyte Symmetrical
Erase Block Architecture
Extended Cycling Capability
Low Power Management
Automated Program and Block Erase
SRAM-Compatible Write Interface
ETOX™ V Nonvolatile Flash
Technology
4 Mbit: Eight Blocks
8 Mbit: Sixteen Blocks
16 Mbit: Thirty-Two Blocks
100,000 Block Erase Cycles
Deep Power-Down Mode
Automatic Power Savings Mode
Decreases I
Command User Interface
Status Register
CC
in Static Mode
PRELIMINARY
Order Number: 290598-004

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E28F016S3-120 Summary of contents

Page 1

E SMART 3 FlashFile™ MEMORY FAMILY 4, 8, AND 16 MBIT 28F004S3, 28F008S3, 28F016S3 Includes Commercial and Extended Temperature Specifications n SmartVoltage Technology Smart 3 Flash and 2 ...

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... Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from: Intel Corporation P.O. Box 5937 Denver, CO 80217-9808 or call 1-800-548-4725 or visit Intel’s Website at http:\\www.intel.com COPYRIGHT © INTEL CORPORATION, 1997 Third-party brands and names are the property of their respective owners. * CG-041493 ...

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E 1.0 INTRODUCTION .............................................5 1.1 New Features...............................................5 1.2 Product Overview.........................................5 1.3 Pinout and Pin Description ...........................6 2.0 PRINCIPLES OF OPERATION .....................11 2.1 Data Protection ..........................................12 3.0 BUS OPERATION .........................................12 3.1 Read ..........................................................12 3.2 Output Disable ...........................................12 3.3 Standby......................................................12 3.4 Deep ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY REVISION HISTORY Number -001 Original version -002 Table 3 revised to reflect change in abbreviations from “W” for write to “P” for program. Ordering information graphic (Appendix A) corrected: from PB = Ext. Temp. ...

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E 1.0 INTRODUCTION This datasheet contains 4-, 8-, and 16-Mbit Smart 3 FlashFile memory specifications. Section provides a flash memory overview. Sections 2.0, 3.0, 4.0, and 5.0 describe the memory organization and functionality. Section 6.0 covers electrical specifications for commercial ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY To protect programmed data, each block can be locked. This block locking mechanism uses a combination of bits, block lock-bits and a master lock-bit, to lock and unlock individual blocks. The block lock-bits gate ...

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E Table 1. Pin Descriptions Sym Type A –A INPUT ADDRESS INPUTS: Inputs for addresses during read and write operations Addresses are internally latched during a write cycle. 4 Mbit 8 Mbit 16 Mbit DQ –DQ INPUT/ DATA ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY ...

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E Figure 3. PSOP 44-Lead Pinout PRELIMINARY BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY 9 ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY Pin #1 Indicator ...

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E 2.0 PRINCIPLES OF OPERATION The byte-wide Smart 3 FlashFile memories include an on-chip WSM to manage block erase, program, and lock-bit configuration functions. It allows for: 100% TTL-level control inputs, fixed power supplies during block erasure, program, and configuration, ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY 2.1 Data Protection Depending on the application, the system designer may choose to make the V power supply PP switchable (available only when memory block erase, program, or lock-bit configuration operations are required) or ...

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E 1FFFFF Block 31 Reserved for Future Implementation 1F0002 Block 31 Lock Configuration Reserved for Future Implementation 1F0000 (Blocks 16 through 30) 0FFFFF Block 15 Reserved for Future Implementation Block 15 Lock Configuration 0F0002 Reserved for Future Implementation 0F0000 (Blocks ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY Table 2. Bus Operations Mode Notes RP# Read 1,2 Output Disable Standby Deep Power-Down ...

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E Table 3. Command Definitions Bus Cycles Command Req’d. Read Array/Reset 1 Read Identifier Codes 2 Read Status Register 2 Clear Status Register 1 Block Erase 2 Program 2 Block Erase and Program 1 Suspend Block Erase and Program 1 ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY 4.1 Read Array Command Upon initial device power-up and after exit from deep power-down mode, the device defaults to read array mode. This operation is also initiated by writing the Read Array command. The ...

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E When the block erase is complete, status register bit SR.5 should be checked block erase error is detected, the status register should be cleared before system software attempts corrective actions. The CUI remains in read status register ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY 4.8 Program Suspend Command The Program Suspend command allows program interruption to read data in other flash memory locations. Once the program process starts, writing the Program Suspend command requests that the WSM suspend ...

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E 4.10 Clear Block Lock-Bits Command All set block lock-bits are cleared in parallel via the Clear Block Lock-Bits command. With the master lock-bit not set, block lock-bits can be cleared using only the Clear Block Lock-Bits command. If the ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY Table 6. Status Register Definition WSMS ESS ECLBS SR.7 = WRITE STATE MACHINE STATUS 1 = Ready 0 = Busy SR.6 = ERASE SUSPEND STATUS 1 = Block Erase Suspended 0 ...

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E Start Write 20H, Block Address Write D0H, Block Address Read Status Register Suspend Block Erase Loop No 0 Suspend SR.7 = Block Erase Yes 1 Full Status Check if Desired Block Erase Complete FULL STATUS CHECK PROCEDURE Read Status ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY Start Write 40H, Address Write Byte Data and Address Read Status Register Suspend Program Loop No 0 Suspend SR.7 = Program 1 Full Status Check if Desired Program Complete FULL STATUS CHECK PROCEDURE Read ...

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E Start Write B0H Read Status Register 0 SR SR.6 = Block Erase Completed 1 Read Program Read or Program ? Program Read Array No Loop Data Done? Yes Write D0H Write FFH Block Erase Resumed Read ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY Start Write B0H Read Status Register 0 SR Program Completed SR Write FFH Read Array Data No Done Reading Yes Write D0H Write FFH Program Resumed Read Array Data ...

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E Start Write 60H, Block/Device Address Write 01H/F1H, Block/Device Address Read Status Register 0 SR Full Status Check if Desired Set Lock-Bit Complete FULL STATUS CHECK PROCEDURE Read Status Register Data (See Above Range ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY Start Write 60H Write D0H Read Status Register 0 SR Full Status Check if Desired Clear Block Lock-Bits Complete FULL STATUS CHECK PROCEDURE Read Status Register Data (See Above) 1 SR.3 = ...

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E 5.0 DESIGN CONSIDERATIONS 5.1 Three-Line Output Control Intel provides three control inputs to accommodate multiple memory connections: CE#, OE#, and RP#. Three-line control provides for: a. Lowest possible memory power dissipation. b. Data bus contention avoidance. To use these ...

Page 28

BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY 5.7 V Program and Erase PP Voltages on Sub-0.4µ S3 Memory Family Intel's byte-wide Smart 3 FlashFile™ memory family provides in-system program/erase at 2.7 V and 3 well as faster factory ...

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E 6.0 ELECTRICAL SPECIFICATIONS 6.1 Absolute Maximum Ratings* Temperature under Bias .............. –10 °C to +80 °C Storage Temperature................. –65 °C to +125 °C Voltage On Any Pin (except V and RP#) ......... –2 +7.0 V PP, V ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY 6.4 DC Characteristics—Commercial Temperature Sym Parameter Notes Typ I Input Load Current Output Leakage Current Standby Current 1,3,6 CCS Deep Power-Down 1 CCD CC ...

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E 6.4 DC Characteristics— Commercial Temperature Sym Parameter Notes Min V Input Low Voltage Input High Voltage Output Low Voltage 3,7 OL 3,7 V Output High Voltage OH1 (TTL) 3,7 V Output High Voltage ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY 2.7 INPUT 1.35 0.0 AC test inputs are driven at 2.7 V for a Logic "1" and 0.0 V for a Logic "0." Input timing begins, and output timing ends, at 1.35 V. Input ...

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RY/BY# ( RP# ( Figure 16. AC Waveform for Reset Operation Table 7. Reset Specifications # Sym Parameter P1 t RP# Pulse Low Time (If RP# is tied to V ...

Page 34

BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY 6.5 AC Characteristics—Read-Only Operations °C to +70 °C A 3.3V ± 0.3V V Versions (4) 2.7V 3. Sym Parameter R1 t Read Cycle Time AVAV R2 t Address to ...

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E Standby V IH ADDRESSES ( CE# ( OE# ( WE# ( DATA (D/Q) High Z (DQ0-DQ7 RP# ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY 6.6 AC Characteristics—Write Operations °C to +70 °C A Versions (4) # Sym RP# High Recovery to WE# (CE#) Going Low PHWL PHEL ...

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ADDRESSES [ CE# (WE#) [E(W OE# [ WE# (CE#) [W(E High Z ...

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BYTE-WIDE SMART 3 FlashFile™ MEMORY FAMILY 6.7 Block Erase, Program, and Lock-Bit Configuration Performance Commercial Temperature V = 3.3V ± 0.3V °C to +70 ° Sym Parameter W16 t Byte Program Time WHRH1 t ...

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E 6.8 Extended Temperature Operating Conditions Except for the specifications given in this section, all DC and AC characteristics are identical to those give in commercial temperature specifications. See the Section 6.2 for commercial temperature specifications. Extended Temperature and V ...

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... Access Speed (ns) 120 ns (3.3 V), 150 ns (2.7 V) Voltage Options ( Smart 3 Flash (2.7 V/ 2.7 V and 3.3 V/3.3 V and 12 V) Product Family S = FlashFile™ Memory (1) Valid Operational Combinations 2.7V–3. Mbit 50 pF load E28F016S3-120 –150 E28F016S3-150 –170 PA28F016S3-120 –150 PA28F016S3-150 –170 G28F016S3-120 –150 G28F016S3-150 –170 ...

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E 8.0 ADDITIONAL INFORMATION Order Number 290597 Byte-Wide Smart 5 FlashFile™ Memory Family Datasheet Byte-Wide SmartVoltage FlashFile™ Memory Family Datasheet 290600 292183 AB-64 4-, 8-, 16-Mbit Byte-Wide FlashFile™ Memory Family Overview AP-359 28F008SA Hardware Interfacing 292094 292099 AP-364 28F008SA Automation ...

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