MC68HC705J1A Motorola, MC68HC705J1A Datasheet - Page 50

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MC68HC705J1A

Manufacturer Part Number
MC68HC705J1A
Description
Manufacturer
Motorola
Datasheet

Specifications of MC68HC705J1A

Case
DIP-20L
Central Processor Unit (CPU)
3.5.4 Program Counter
The program counter (PC) is a 16-bit register that contains the address
of the next instruction or operand to be fetched. The five most significant
bits of the program counter are ignored and appear as 00000.
Normally, the address in the program counter automatically increments
to the next sequential memory location every time an instruction or
operand is fetched. Jump, branch, and interrupt operations load the
program counter with an address other than that of the next sequential
location.
Read:
Write:
Reset:
3.5.5 Condition Code Register
The condition code register (CCR) is an 8-bit register whose three most
significant bits are permanently fixed at 111. The condition code register
contains the interrupt mask and four flags that indicate the results of the
instruction just executed.
Read:
Write:
Reset:
Technical Data
50
Bit
15
14
13
12
11
10
9
0
0
0
0
0
Loaded with vector from $07FE and $07FF
Figure 3-5. Program Counter (PC)
Bit 7
6
5
4
1
1
1
H
1
1
1
U
= Unimplemented
Figure 3-6. Condition Code Register (CCR)
Central Processor Unit (CPU)
8
7
6
5
4
3
2
3
2
1
I
N
Z
1
U
U
U = Unaffected
MC68HC705J1A — Rev. 4.0
MOTOROLA
Bit
1
0
Bit 0
C
U

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