MC68HC705J1A

Manufacturer Part NumberMC68HC705J1A
ManufacturerMotorola
MC68HC705J1A datasheet
 


Specifications of MC68HC705J1A

CaseDIP-20L  
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Page 71/162:

Power-On Reset

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4.3.1 Power-On Reset
A positive transition on the V
NOTE:
The power-on reset is strictly for power-up conditions and cannot be
used to detect drops in power supply voltage.
A 4064-t
active allows the clock generator to stabilize. If any reset source is active
at the end of this delay, the MCU remains in the reset condition until all
reset sources are inactive.
ADDRESS BUS
Notes:
1. Power-on reset threshold is typically between 1 V and 2 V.
2. Internal clock, internal address bus, and internal data bus are not available externally.
MC68HC705J1A — Rev. 4.0
MOTOROLA
DD
(internal clock cycle) delay after the oscillator becomes
cyc
V
DD
OSCILLATOR STABILIZATION DELAY
(NOTE 1)
OSC1 PIN
INTERNAL
CLOCK
INTERNAL
$07FE
$07FE
INTERNAL
DATA BUS
Figure 4-2. Power-On Reset Timing
Resets and Interrupts
Resets and Interrupts
pin generates a power-on reset.
$07FE
$07FE
$07FE
$07FE
NEW PCH NEW PCL
Resets
$07FF
Technical Data
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