MC68HC705J1A Motorola, MC68HC705J1A Datasheet - Page 93

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MC68HC705J1A

Manufacturer Part Number
MC68HC705J1A
Description
Manufacturer
Motorola
Datasheet

Specifications of MC68HC705J1A

Case
DIP-20L
6.4.2 Data Direction Register B
Data direction register B (DDRB) determines whether each port B pin is
an input or an output.
Address:
Read:
Write:
Reset:
DDRB[5:0] — Data Direction Register B Bits
These read/write bits control port B data direction. Reset clears
DDRB[5:0], configuring all port B pins as inputs.
NOTE:
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Figure 6-8
MC68HC705J1A — Rev. 4.0
MOTOROLA
$0005
Bit 7
6
5
0
0
DDRB5
DDRB4
0
0
0
= Unimplemented
Figure 6-7. Data Direction Register B (DDRB)
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
shows the I/O logic of port B.
READ DDRB
WRITE DDRB
DDRBx
WRITE PORTB
PBx
READ PORTB
WRITE PDRB
PDRBx
RESET
Figure 6-8. Port B I/O Circuitry
Parallel Input/Output (I/O) Ports
Parallel Input/Output (I/O) Ports
4
3
2
1
DDRB3
DDRB2
DDRB1
0
0
0
0
100- A
PULLDOWN
SWPDI
Technical Data
Port B
Bit 0
DDRB0
0
PBx
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