CY37128P84-100JI

Manufacturer Part NumberCY37128P84-100JI
Description5V, ISR high-performance CPLDs, 128 macrocells, 100MHz
ManufacturerCypress Semiconductor Corporation.
CY37128P84-100JI datasheet
 


Specifications of CY37128P84-100JI

CasePLCC-84L  
1
2
3
4
5
6
7
8
9
10
11
Page 11
12
Page 12
13
Page 13
14
Page 14
15
Page 15
16
Page 16
17
Page 17
18
Page 18
19
Page 19
20
Page 20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Page 15/64

Download datasheet (3Mb)Embed
PrevNext
[5]
Inductance
Parameter Description Test Conditions
L
Maximum Pin
V
= 5.0V
IN
Inductance
at f = 1 MHz
Capacitance
[5]
Parameter
Description
C
Input/Output Capacitance
I/O
C
Clock Signal Capacitance
CLK
C
Dual-Function Pins
DP
Endurance Characteristics
[5]
Parameter
Description
N
Minimum Reprogramming Cycles
3.3V Device Characteristics
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
Supply Voltage to Ground Potential ............... –0.5V to +4.6V
Operating Range
[2]
Range
Ambient Temperature
Commercial
Industrial
[3]
Military
3.3V Device Electrical Characteristics
Parameter
Description
V
Output HIGH Voltage
OH
V
Output LOW Voltage
OL
V
Input HIGH Voltage
IH
V
Input LOW Voltage
IL
I
Input Load Current
IX
I
Output Leakage Current
OZ
I
Output Short Circuit Current
OS
I
Input Bus-Hold LOW Sustaining Current V
BHL
I
Input Bus-Hold HIGH Sustaining Current V
BHH
I
Input Bus-Hold LOW Overdrive Current V
BHLO
I
Input Bus-Hold HIGH Overdrive Current V
BHHO
Notes:
9. Dual pins are I/O with JTAG pins.
10. For CY37064VP100-143AC, CY37064VP100-143BBC, CY37064VP44-143AC, CY37064VP48-143BAC; Operating Range: V
Document #: 38-03007 Rev. *E
44-Lead
44-Lead
44-Lead
84-Lead
TQFP
PLCC
CLCC
PLCC
2
5
2
8
Test Conditions
V
= 5.0V at f = 1 MHz at T
IN
V
= 5.0V at f = 1 MHz at T
IN
[9]
V
= 5.0V at f = 1 MHz at T
IN
Test Conditions
Normal Programming Conditions
DC Voltage Applied to Outputs
in High-Z State................................................–0.5V to +7.0V
DC Input Voltage ............................................–0.5V to +7.0V
DC Program Voltage............................................. 3.0 to 3.6V
Current into Outputs ...................................................... 8 mA
Static Discharge Voltage........................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current..................................................... > 200 mA
[2]
Junction Temperature
0°C to +70°C
0°C to +90°C
–40°C to +85°C
–40°C to +105°C
–55°C to +125°C
–55°C to +130°C
Over the Operating Range
Test Conditions
V
= Min.
I
= –4 mA (Com’l)
CC
OH
I
= –3 mA (Mil)
OH
V
= Min.
I
= 8 mA (Com’l)
CC
OL
I
= 6 mA (Mil)
OL
Guaranteed Input Logical HIGH Voltage for
[7]
all Inputs
Guaranteed Input Logical LOW Voltage for
[7]
all Inputs
V
= GND OR V
, Bus-Hold Disabled
I
CC
V
= GND or V
, Output Disabled,
O
CC
Bus-Hold Disabled
[5, 8]
V
= Max., V
= 0.5V
CC
OUT
= Min., V
= 0.8V
CC
IL
= Min., V
= 2.0V
CC
IH
= Max.
CC
= Max.
CC
Ultra37000 CPLD Family
84-Lead
100-Lead
160-Lead
208-Lead
CLCC
TQFP
TQFP
PQFP Unit
5
8
9
11
nH
Max.
Unit
= 25°C
10
pF
A
= 25°C
12
pF
A
= 25°C
16
pF
A
Min.
Typ.
Unit
[2]
1,000
10,000
Cycles
[10]
V
CC
3.3V ± 0.3V
3.3V ± 0.3V
3.3V ± 0.3V
Min.
Max.
Unit
[4]
2.4
V
[4]
[4]
0.5
V
[4]
2.0
5.5
V
–0.5
0.8
V
µA
–10
10
µA
–50
50
–30
–160
mA
µA
+75
µA
–75
µA
+500
µA
–500
is 3.3V± 0.16V.
CC
Page 15 of 64
[+] Feedback