SDA9400 Micronas, SDA9400 Datasheet
SDA9400
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Edition Feb. 28, 2001 6251-551-1PD PRELIMINARY DATA SHEET SDA 9400 SCARABAEUS Scan Rate Converter using Embedded DRAM Technology Units ...
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... Page 12.01.99 05.05.99 page 86 26.04.00 all 1)... DS = Document state, compares to block 4 of document number Micronas Changes compared to previous issue Changes to the previous issue Version 03, Edition 05/98 are marked with a change bar ESD CDM model added, -1.5 kV, ..., 1,5 kV Preliminary Data Sheet Version 01, Edition 04/00 update new logo, removal of change bars ...
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... I²C bus format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64 6.8.3 I²C bus commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66 6.8.4 Detailed description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69 7 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 8 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 9 Characteristics (Assuming Recommended Operating Conditions Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 11.1 I²C-bus timing START/STOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 11.2 I²C-bus timing DATA Micronas 3 Preliminary Data Sheet ...
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... SDA 9400 11.3 Timing diagram clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 11.4 Clock circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 12 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 Micronas 4 Preliminary Data Sheet ...
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... SDA 9400 1 General description The SDA 9400 is a new component of the Micronas MEGAVISION DRAM technology (frame memory embedded). The SDA 9400 is pin compatible to the SDA 9401 (field memory embedded). The SDA 9400 comprises all main functionalities of a digital featurebox in one monolithic IC. ...
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... Support of multi picture display with PIP or front-end processor with integrated scaler (e.g. 9 times display of PIP pictures, picture tracking, random pictures, still-in-moving picture, moving-in-still picture) • I²C-bus control (400 kHz) • P-MQFP-64 package • 3.3 V ± 5% supply voltage Micronas 6 Preliminary Data Sheet ...
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... OSC - Flexible output sync controller OFC - Output format conversion HDR - High data rate processing (scan rate conversion, vertical expansion) I²C - I²C bus interface PLL1/2 - PLL for frequency doubling LM - Line memory core ED - eDRAM core Micronas OSC Output sync MC controller Memory Controller ED eDRAM ...
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... YOUT2 6 YOUT1 7 YOUT0 8 VSS1 9 VDD1 10 UVOUT7 11 UVOUT6 12 UVOUT5 13 UVOUT4 14 UVOUT3 15 UVOUT2 16 UVOUT1 Micronas SDA 9400 YIN5 47 YIN4 46 YIN3 45 YIN2 44 YIN1 YIN0 43 VSS1 42 VDD1 41 UVIN7 40 ...
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... HREF 61 VOUT/ VEXT 60 HOUT/ HEXT 18 INTERLACED O/TTL Interlace signal for AC coupled vertical deflection CLK2 CLKOUT 19 TEST Micronas Type Description S Supply voltage ( Supply voltage ( Supply voltage ( Supply voltage ( V DD I/TTL Data input Y (see input data format) I/TTL ...
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... SDA 9400 S: supply, I: input, ANA: analog PD: pull down Micronas O: output, TTL: digital (TTL) 10 Preliminary Data Sheet ...
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... HIN VIN lines per field The distance between the incoming H-syncs in system clocks of clk1 must be even. Micronas Pin number horizontal synchronization signal (polarity programmable, I²C bus parameter 01h HINPOL, default: high active) vertical synchronization signal (polarity programmable, I²C bus parameter 01h ...
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... HIN signal (H1). The figure below explains the field detection process and the functionality of the VINDEL parameter (inside the SDA 9400 the delayed VIN signal is called Vd and the detected field signal is called Ffd). Micronas Description Not Active Line InPut defines the number of lines from ...
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... The OPDEL parameter is used to adjust the outgoing V-Sync VOUT in relation to the incoming delayed V-Sync VIN. In case 100 Hz interlaced scan rate conversion the OPDEL parameter should be greater than half the number of lines of a field plus the internal processing delay (8 lines). Micronas (VINDEL * 128 + 1) * Tclk1 Field 1(A) x ...
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... Soft Mix I) are not supported (see also generator on page 46). The compression of the inserted picture has also be done by the external PIP or front-end processor. Picture insert mode: application examples picture tracking, random pictures Micronas Description Delay (in number of lines) of the internal V-Sync (delayed VIN) to the outgoing V-Sync (VOUT) Description ...
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... YIN7 YIN6 YIN5 YIN4 YIN3 YIN2 YIN1 YIN0 UVIN7 UVIN6 UVIN5 UVIN4 UVIN3 UVIN2 UVIN1 UVIN0 X X: signal component a: sample number b: bit number : ab Micronas Pin number luminance input chrominance input CCIR 656 4:2:2 Parallel FORMAT = 1X FORMAT = 00 FORMAT = ...
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... The figure below explains the functionality of the SYNCEN signal. The SDA 9400 needs the SYNCEN (synchronization enable) signal, which is used to gate the YIN, UVIN as well as the HIN and the VIN signal. This is implemented for front-ends which are working with 13.5 MHz and a large Micronas HIN VIN ...
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... SDA 9400 output delay time for YIN, UVIN, HIN and VIN (e.g. Micronas VPC32XX, output delay: 35 ns). For this application the half system clock CLK1 (13.5 MHz) from the front-end should be provided at this pin. In case the front-end is working at 27.0 MHz with sync signals having delay times smaller than 25 ns, this input can be set to low level (SYNCEN=V ns) ...
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... The table below shows the relation between the parameter VDECON and the compression factor. Input write parameter: VDECON Micronas MULTIPIC, PICPOS, YBORDER, UBORDER, VBORDER GMOTION, MOVMO, MOVPH ...
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... Connection between APPL and APPLIP no horizontal compression (HDECON = ’00’) horizontal compression, Factor 2 (HDECON = ’01’) horizontal compression, Factor 4 (HDECON = ’10’) MULTIPIC > ’0’ (dominant, see also Micronas Output sync controller (OSC) HDECON (1Ch horizontal compression 01 10 ...
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... The figures below show the different “multi picture modes” as they are represented on the display. Fourfold multi picture PICPOS =0 PICPOS =2 Twelvefold multi picture PICPOS=0 PICPOS=4 PICPOS=8 Sixteenfold multi picture Micronas PICPOS =1 PICPOS =3 PICPOS=1 PICPOS=2 PICPOS=3 PICPOS=5 PICPOS=6 PICPOS=7 PICPOS=9 PICPOS=10 PICPOS= ...
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... NTSC systems are supported. A mixture of PAL and NTSC signals is also possible. Input write parameter Parameter Subaddress MULTIPIC 1Bh PICPOS 1Bh YBORDER 17h UBORDER 18h Micronas Vertical compression normal operation, no compression Input sync controller (ISC) Output sync controller (OSC) Description ...
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... The borders are fixed to a width of 16 pixels in horizontal direction. In vertical direction the border widths are also fixed, the number of lines, however, depends on the TV standard of the input and the display. Micronas Description V background value Freeze mode (frozen picture) on page 46) ...
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... The next figure shows a block diagram of the spatial noise reduction. For the UV signal only a simple spatial noise reduction algorithm (vertical and/or horizontal low pass filtering) is implemented. Micronas SNRON YR Spatial ...
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... Depending on the motion in the input signal, the K-factor Ky (Kuv) can be adjusted between 0 (no motion) and 15 (motion) by the motion detector. The K-factor for the chrominance filter can be either Ky (output of the luminance motion detector, TNRSEL=0) or Kuv (output of the chrominance motion detector, TNRSEL=1). For the luminance Micronas ...
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... The “Motion”-Ky/Kuv characteristic curve (LUT) is fixed inside the SDA 9400, but the characteristic curve can be changed by two parameters: TNRHOY/C and TNRKOY/C. TNRHOY/C shifts the curve horizontally and TNRKOY/C shifts the curve vertically. For a fixed characteristic curve, the sensitivity of the motion detector is adjustable by TNRCLY/C. Micronas Ky æ ö YSNR YR ...
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... LUT for motion detection I Ky/Kuv LUT for motion detection II Ky/Kuv Parameter TNRVAY/C Parameter TNRVAY/C strong noise reduction (not motion adaptive, Ky/K=0) Parameter TNRHOY/C and TNRKOY/C Parameter TNRHOY/C TNRKOY/C Micronas TNRKOY TNRHOY (minimum value) Range -32, ... , 31 -8, ..., 7 26 ...
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... SDA 9400 for the measurement. In case of VINDEL=0 and NMLINE=0 line 3 of the field A and line 316 of the field B is chosen. In case of VINDEL=0 and NMLINE=3 line 6 of the field A and line 319 of the field B is chosen. Micronas 0 (minimum value) Switch for motion detection of temporal noise reduction ...
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... NMLINE=3 : Input write parameter Parameter Subaddress NMALG 1Dh NMLINE 28h Input read parameter Parameter Subaddress NOISEME 32h NMSTATUS 33h Micronas Field1 (A) 624 625 Measure Field2 (B) 312 313-1 314-2 315-3 Measure PAL Noise measurement algorithm 1: measurement during vertical blanking period (measure ...
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... Block diagram motion detection FRD3 frame delay delay Input write parameter Parameter Subaddress [Default value] SVALLI 28h [1] THLI2, THLI1, 29h, 2Ah THLI0 [12 Micronas THRMOV THRGM THRESH LDDEL Line IN Difference THRESH IN1 Frame LUTFR Y Difference IN2 IN1 Field LUTFI Y ...
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... The thresholds are programmable by the parameters THLI2, THLI1 and THLI0. Parameter SVALLI Parameter SVALLI maximum sensitivity line difference Parameter THLI2, THLI1, THLI0 Micronas Sensitivity of field difference Threshold of field difference Sensitivity of frame difference Threshold of frame difference Switch for global motion detection Threshold of frame difference for global motion detection ...
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... FID3 and FRD3 signal are also one bit signals. Both signals are independent of the parameters described up to now. The FID3 signal depends only on the threshold THRMOV and the FRD3 signal depends only on the threshold THRGM possible to optimise the movie mode and global Micronas 0 (minimum value) THFI0 ...
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... FRAFION controls mval as described before. If movie mode is detected (MOVMO=1) the LSB of AMMON controls the output mval instead of FRAFION. LSB of AMMON=0 supplies the frame difference and LSB of AMMON=1 sets the output to constant zero. Behaviour of ADD block AMMON Micronas Field difference > THRMOV otherwise Frame difference > THRGM otherwise SWGM ...
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... MOVPH are one bit signals and can be read out by I²C-bus or can be used internal to influence the motion detection for scan rate conversion as well as the scan rate conversion itself (see also sync controller (OSC) on page 40). The diagram below shows the block diagram of the global motion, movie mode and phase detection algorithm. Micronas MOVMO FRAFION 0 0 ...
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... Behaviour spatial hysteresis The time hysteresis block generates the final GMOTION value. The GMOTION value will only changed least the last GMAM/GMAS fields had the same SHYST value. Behaviour of time hysteresis GMOTION(T) 0 Micronas GMTHL GMTHU GMAS GMAM SHYST COUNTGM Hysteresis ...
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... RESMOV = 1, the MOVMO is set to camera mode (MOVMO=0) and the time hysteresis queue is reset too. RESMOV = 0 means normal behaviour of the movie mode and movie phase detection block. Block diagram of movie mode and phase detection COUNTMOV Micronas last GMAM fields, SHYST were 1 otherwise Operation mode generator MMTHL ...
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... Parameter Subaddress GMTHU 23h GMTHL 24h GMAS 25h GMAM 26h Micronas CMP 1 COUNT > COUNT < TH ABS(COUNT(T)-COUNT(T-1)) < 64* MMTH ABS(COUNT(T)-COUNT(T-1)) >= 64* MMTH Movie mode: last 2*(MMTC+1) CMP values were sequence of 0 and and 0 (e.g. 101010 or 010101) Camera mode: last 2*(MMTC+1) CMP values were 1 ...
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... Clock concept Input signals Signals CLK1 54 X1/CLK2 28 Micronas Movie mode detection time constant Movie mode detection threshold Inversion of the movie phase signal Time hysteresis for movie mode detection on/off (camera->movie: 2*(MMTC+1); movie->camera: (MMTC+1)) 0: off (camera<->movie: 2*(MMTC+1)) Reset of movie mode detection time hysteresis queue ...
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... HOUT and VOUT generator”). Clock concept CLK1 1 X1/CLK2 0 CLK21EN Clock concept switching matrix CLK11EN (19h Clock FREQR CLK1_pll1 X CLK2_pll2 0 X1/CLK2 1 Micronas Pin number Clock output PLL1 CLK1_pll1 0 PLL2 1 CLK2_pll2 CLK11EN CLK21EN (19h) FREQR (1Bh ISC, IFC, LDR, ED, MC, LM, I² ...
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... PLL1RA 09h,0Ah PLL2OFF 16h 1: off 0: on PLL2RA 19h CLKOUTON 16h 1: enabled 0: disabled Micronas Description PLL off PLL range, only for test purposes PLL off PLL range, only for test purposes Output of system clock 39 Preliminary Data Sheet ...
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... The output sync controller generates horizontal and vertical synchronization signals for the scan rate converted output signal. The figures below show the block diagram of the OSC and the existing parameters. Micronas Pin number horizontal synchronization signal for external synchronization (polarity pro- grammable, I² ...
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... Output write parameter Parameter Subaddress [Default value] NALOP 0Bh [22] ALPFOP 0Ch [144] LPFOP 0Dh [156] HOUTDEL 0Fh [4] Micronas HOUTPOL, HOUTFR, APPLOP, HOUTDEL, NAPOP, PPLOP, EXSYN HOUT generator VOUT generator OPERATION mode generator STOPMODE, VOUTPOL, INTMODE, ADOPMODE NALOP, ALPFOP, LPFOP, EXSYN, CONV ...
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... Horizontal compression parameter APPL, see also displayed pixels (e.g. displaying a 4:3 source on a 16:9 screen), a coloured border can be defined using the NAPOP parameter. The border colour is defined by the parameters YBORDER, Micronas Description Not Active Pixel OutPut defines the number of not active pixels (e.g. coloured border values) ...
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... EXSYN 14h off YBORDER 17h UBORDER 18h VBORDER 18h CAPP 10h Micronas 64 * Tx1/clk2 PPLOP * 2 Tx1/clk2 e.g. 432 * MHz = 32 µ APPLOP * 16 * Tx1/clk2 e. 720 Tx1/clk2 ...
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... Output write parameter: CONV, RMODE CONV RMODE = 0 Input syncs Output syncs 000 1 2 001 8 18 010 7 16 011 6 14 100 5 12 101 4 10 Micronas Input sync controller (ISC) RMODE=1 RMODE=0 RMODE = 1 Factor Output syncs 1 1.0 9 1.125 (9/8) 8 1.14 (8/7) 7 1.16 (7/6) 6 1.2 (6/5) 5 1.25 (5/ page 11). MODE e.g. ...
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... For vertical synchronization the maximum synchronization time is 260 ms for interlaced and 520 ms for progressive display modes. Horizontal synchronization is performed in a maximum time of 50 ms. To get the best performance it is recommended to change at first the vertical and after the mentioned delay times the horizontal mode from free running to locked. Micronas RMODE = 1 Factor 7 1 ...
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... The field information describes the picture content. The output signal, which could contain different picture contents (e.g. field A, field B ) can be displayed with the display raster ∼ or ϒ. n ,∼) - Output signal, field A at time n, displayed as raster ∼Ι (A Micronas FRAME/FIELD DISPLAY RASTER Display raster odd lines even lines Display raster ϒ ...
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... Static operation modes (only valid for ADOPMODE=0) Scan rate conversion STOPMODE algorithm 0000 ABAB mode I interlaced 0001 AA*B*B mode I interlaced 0010 AABB mode I interlaced 0011 Micronas Soft mix I (motion adaptive mode interlaced) 0100 Multipicture mode I Micronas Principles of scan rate conversion n-1 n ...
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... AB mode progres- 0110 sive 0001 AA* mode I pro- gressive 0010 not defined 0011 Micronas soft mix (motion adaptive mode progressive) 0101 AA* mode II pro- gressive 0111 B*B mode progres- sive 1000 Test Mode (motion adaptive mode interlaced, DL) ...
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... STOPMODE algorithm 1xxx not defined For STOPMODE=0011 (Micronas soft mix I) the high performance motion detector is used to switch motion adaptive pixel by pixel between different algorithms. This scan rate conversion method results in a high performance line flicker reduction (see also page 55). The table below shows all possible display raster sequences for the different static operation modes and the lines per field value between two consecutive output V-Syncs ...
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... All internal control signals GMOTION, MOVMO and MOVPH are also readable by the I²C-bus interface. Adaptive operation modes (RMODE = 0 (interlaced)): Micronas Raster interpolation method linear filter median filter ...
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... STOPMODE AABB mode I interlaced AABB mode I interlaced ADOPMODE: Field mixer mode II ADOPMODE=011 STOPMODE AABB mode I interlaced AA*B*B mode I interlaced ADOPMODE: Movie mode I ADOPMODE=100 STOPMODE ABAB mode I interlaced ABAB mode II interlaced Micronas MOVMO MOVPH x x MOVMO MOVPH MOVMO MOVPH ...
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... ABAB mode I interlaced ABAB mode II interlaced AABB mode I interlaced ADOPMODE: Field mixer mode II and movie mode ADOPMODE=111 STOPMODE AABB mode I interlaced ABAB mode I interlaced ABAB mode II interlaced AA*B*B mode I interlaced Micronas MOVMO MOVPH x x MOVMO MOVPH MOVMO MOVPH ...
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... In this case the scan rate conversion algorithm is only controlled by the signal GMOTION. If GMOTION=0, the scan rate algorithm is defined by the parameter STOPMODE (e.g. Micronas field mixer algorithm). If GMOTION=1 the scan rate conversion algorithm is changed to the simple AABB mode I interlaced. The behaviour in this case is like the Micronas FIELD MIXER circuit SDA9270. Recommended operation mode combinations MO ...
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... Parameter Subaddress INTMODE 13h, 14h STOPMODE 12h ADOPMODE 12h MEDON 17h FIXSHR 17h CSMOFF 19h PSMOFF 19h Micronas FIELD A Output Scan rate conversion field phase algorithm Free programmable INTERLACED signal for AC-cou- pled deflection stages Static operation modes ...
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... If the motion range exceeds the separation point, the AABB method is applied. Otherwise the e.g. Soft Mix method is used as the scan rate conversion method. In case of movie mode ABAB or BABA is applied. The switching is automatically done if one of the adaptive modes (I²C bus parameter ADOPMODE) is used. Micronas 55 Preliminary Data Sheet ...
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... SDA 9400 Principles of scan rate conversion GMOTION = 0 (still) MOVMO = 0 (camera) MOVPH = X STOPMODE e.g. Soft Mix II (1011) ABAB (0000) Soft Mix Micronas GMOTION = 1 (motion) MOVMO = 0 (camera) MOVPH = X AABB (0010) GMOTION = X MOVMO = 1 (movie) MOVPH = X ABAB (0000) or BABA (1000) pixel based switch A'B'A"B" AABB ...
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... WINDHST/WINDVST parameter is only once interpreted after enabling the window function. To change afterwards the status from “window is close” to “window is open” or vice versa only the WINDHDR/WINDVDR has to be Micronas WINDHDR/ Description ...
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... Distance: Number of pixels in system clocks X1/CLK2 between two output H-Syncs time to close = time(field) * number of active pixels / (distance/512) e.g. time to close = 720 / (864/512) = 4,26 s time to close = time(field) * number of active pixels / (pplop/128) Output write parameter: WINDVSP windvsp Micronas freerun locked mode mode pplop/256 distance/512 pplop/128 distance/256 pplop/64 ...
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... UVOUT0...7 17, 16, 15, 14, 13, 12, 11, 10 The SDA 9400 supports at the output side only the sample frequency relations (B-Y) : (R-Y): Micronas Vertical window feature on or off Direction of the vertical window feature Status of the vertical window feature after enabling the ...
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... In this case only simple processing will be possible. Simple processing means, that the vertical expansion must be disabled. To force simple processing the parameter FREQR is used. Furthermore all static operation modes are disabled, which needs the interpolation into another raster position like Micronas soft mix mode. Output write parameter: FREQR FREQR ...
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... Micronas X1/CLK2 > 27 MHZ + 10% VERINT RMODE I²C-bus 0 parameter I²C-bus 1 parameter 100/120 Hz 50/60 Hz interlaced progressive RMODE=0 RMODE=1 CONV=0 CONV=0 ZOOM ZOOM ...
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... Micronas 100/120 Hz 50/60 Hz interlaced progressive RMODE=0 RMODE=1 CONV=0 CONV=0 ZOOM ZOOM ...
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... VPAN value depending on the chosen VERINT value. Calculation of maximum VPAN value VPANmax Floor symbol means: take only integer part of x Output write parameter Parameter Subaddress VERINT 13h VPAN 1Ah FREQR 1Bh Micronas 100/120 Hz 50/60 Hz interlaced progressive RMODE=0 RMODE=1 CONV=0 CONV=0 ZOOM ZOOM æ ...
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... GMOTION, MOVMO, MOVPH, TVMODE) exist. NMSTATUS signalizes a new value for NOISEME NMSTATUS is read as ’0’ the current noise measurement has not been finalized. If the NMSTATUS is read as ’1’ a new noise measurement Micronas ...
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... R/ Read register Write Register; R/W - Read and Write Register; Take over take over with VIN; OS- take over with OPSTART Reading the “Read only” register 32h must be followed by reading the “Read only” register 33h. Micronas Take R/W Subaddress over W VI ...
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... APPLOP5 APPLOP4 10 OSC PPLOP7 PPLOP6 11 OSC PPLOP8 STOPMODE3 12 OSC INTMODE3 INTMODE2 13 OSC INTMODE1 INTMODE0 14 OSC WINDVON WINDVDR 15 OSC Micronas Data Byte FIEINV VCRMODE ISC ISC VINDEL3 VINDEL2 ISC ISC ISC NALIP3 NALIP2 ISC ISC ISC ALPFIP5 ALPFIP4 ISC ISC ISC ...
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... THLI25 THLI24 29 LDR THLI12 THLI11 2A LDR THFI33 THFI32 2B LDR THFI20 THFI14 2C LDR THFI01 THFI00 2D LDR THFR23 THFR22 2E LDR Micronas WINDHST WINDHSP1 OSC OSC OSC YBORDER1 YBORDER0 OFC/LDR OFC/LDR UBORDER1 UBORDER0 OFC/LDR OFC/LDR PLL2RA1 PLL2RA0 PLL2 PLL2 PLL2 VPAN5 VPAN4 PICPOS3 ...
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... IFC - Input format conversion block OSC - Output sync controller block OFC - Output format conversion block LDR - Low data rate block HDR - High data rate block MC - Memory controller PLL1 - Clock doubling block 1 PLL2 - Clock doubling block 2 Micronas THFR01 THFR00 LDR LDR LDR THRMOV4 THRMOV3 ...
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... SDA 9400 the data are always processed as unsigned data Bit Name D7...D2 VINDEL D1 VINPOL D0 HINPOL Micronas Subaddress 00 Function Subaddress 01 VIN input delay: Delay(VIN to internal V-sync) = (128 * VINDEL + 1)*Tclk1 [VINDEL = 0] VIN polarity: 1: low active 0: high active HIN polarity: ...
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... Name NAPIPDL D7...D0 (MSBs of NAPLIP) Bit Name D7...D2 APPLIP D1...D0 x Micronas Subaddress 02 Number of not active lines per field in the input data stream: Not active lines = NALIP+3 [NALIP= 20] PLL1 switch: 1: off 0: on Internal refresh off Subaddress 03 Number of active lines per field in the input data stream: ...
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... HORWIDTH D1...D0 PLL1RA(1...0) Bit Name D7...D2 HORPOS D1...D0 PLL1RA(3...2) Micronas Subaddress 06 Output processing delay (in number of lines): Delay(VIN to VOUT) = (OPDEL + 1) * Tline [OPDEL = 170] Subaddress 07 Vertical width of inserted picture in input lines: Vertical width = (2 * VERWIDTH) [VERWIDTH = 0] Subaddress 08 Vertical position of inserted picture in input lines: Vertical position = (2 * VERPOS) + NALIP + 3 [VERPOS = 0] ...
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... Bit Name D7...D0 NAPOP Bit Name D7...D0 HOUTDEL Micronas Subaddress 0B Number of not active lines per frame in the output data stream: Not active lines = 2 * (NALOP + 1) [NALOP= 22] Subaddress 0C Number of active lines per output frame: Active lines = 4 * ALPFOP [ALPFOP= 144] Subaddress 0D Number of lines per output frame (only valid for VOUTFR=1): ...
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... D7 PPLOP(8) D6...D3 STOPMODE D2...D0 ADOPMODE Micronas Subaddress 10 Number of active pixels per line (including coloured border values and data) in the output data stream in system clocks of X1/CLK2 (length of HREF): Active pixels = 16 * APPLOP [APPLOP = 45] Reduces the active pixels per line (APPL) at the output side: ...
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... INTMODE(1...0) D5 EXSYN D4 RMODE D3 VOUTFR D2 HOUTFR D1 VOUTPOL D0 HOUTPOL Micronas Subaddress 13 Free programmable INTERLACED signal for AC coupled deflection stages (Bit 3 and Bit 2) [INTMODE3... Vertical expansion factor (see also on page 60): 63: no vertical expansion : 47: vertical expansion with factor 1.5 : 31: vertical expansion with factor 2 : Subaddress 14 Free programmable INTERLACED signal for AC coupled deflection stages (Bit 1 and Bit 0) [INTMODE1 ...
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... D6 WINDHDR D5 WINDHST D4...D3 WINDHSP D2 CLKOUTON D1 PLL2OFF D0 x Micronas Subaddress 15 Vertical window off 1: close the vertical window 0: open the vertical window Status of vertical window after entering vertical window mode: 1: window is opened 0: window is closed Speed of vertical window (see also 11: very fast 10: fast ...
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... Name D7...D4 PLL2RA D3 CLK21EN D2 CLK11EN D1 CSMOFF Micronas Subaddress 17 Y border value (Yborder(3) Yborder(2) Yborder(1) Yborder( 00010000 = 16), YBORDER defines the 4 MSB’ bit value Flash of output picture off Chrominance output format: 1: 2’s complement input (-128...127) 0: unsigned input (0...255) ...
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... Bit Name D7...D0 VPAN Bit Name D7...D6 MULTIPIC D5...D2 PICPOS D1 FREEZE D0 FREQR Micronas Subaddress 19 Temporal mixing II: 1: off 0: on Subaddress 1A Vertical adjustment of the output picture [VPAN = 0] Subaddress 1B Multipicture modes: 11: sixteenfold 10: twelvefold 01: fourfold 00: off (In case of MULTIPIC>0, spatial and temporal noise reduction as well as ...
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... D2...D1 AMMON D0 FRAFION Bit Name D7 NRON D6 SNRON D5 VCSNRON Micronas Subaddress 1C Vertical decimation of the input data stream: 111: not used 110: factor 4.0 101: factor 3.0 100: factor 2.0 011: factor 1.75 010: factor 1.5 001: factor 1.25 000: off (In case of VDECON>0, spatial noise reduction as well as the motion ...
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... Bit Name D7...D4 TNRCLY D3...D0 TNRCLC Bit Name D7...D4 TNRKOY D3...D0 TNRKOC Micronas Subaddress 1D Horizontal spatial noise reduction of chrominance: 1: enabled 0: disabled Temporal noise reduction of luminance: 1: frame based 0: field based Inversion of the MOVPH signal: 1: enabled 0: disabled Motion detection of temporal noise reduction of chrominance: ...
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... D0 VLEROFF Bit Name D7...D1 GMTHU D0 HPS1OFF Micronas Subaddress 20 Fixed K-factor for temporal noise reduction of luminance [TNRVAY = 15] Fixed K-factor for temporal noise reduction of chrominance [TNRVAC = 15] Subaddress 21 Temporal noise reduction of luminance: Horizontal shift of the motion detector characteristic [TNRHOY=0] Fixed K-factor switch for temporal noise reduction of luminance: ...
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... D0 VLEXOFF Bit Name D7...D1 MMTHL D0 x Micronas Subaddress 24 Global motion detection spatial hysteresis: lower threshold [GMTHL =67] Horizontal pixel erosion 2 of motion detection for scan rate conversion: 1: off 0: on Subaddress 25 Global motion detection amount of still pictures [GMAS = 29] Movie mode detection time constant [MMTC3... ...
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... THLI1(2...0) D4...D1 THLI0 D0 THFI3(4) Bit Name D7...D4 THFI3(3...0) D3...D0 THFI2(4...1) Micronas Subaddress 28 Line for noise measurement (only valid for NMALG=1) [NMLINE = 4] Sensitivity of line difference in the motion detection for scan rate conversion: 11: factor 32 (minimum) 10: factor 16 01: factor 8 00: factor 4 (maximum) x Subaddress 29 Threshold 2 of line difference in the motion detection for scan rate ...
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... Bit Name D7...D4 THFR0 D3...D2 SVALFI Micronas Subaddress 2C Threshold 2 (Bit 0) of field difference in the motion detection for scan rate conversion [THFI20 = 0] Threshold 1 of field difference in the motion detection for scan rate conversion [THFI1 = 16] Threshold 0 (Bit 3 and Bit 2) of field difference in the motion detection for scan rate conversion [THFI03 ...
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... D7...D6 SWGM D5...D1 THRGM D0 x Bit Name D7...D3 NOISEME Micronas Subaddress 2F Sensitivity of frame difference in the motion detection for scan rate conversion: 11: factor 8 (minimum) 10: factor 4 01: factor 2 00: factor 1 (maximum) Subaddress 30 Time hysteresis for movie mode detection on/off (camera->movie: 2*(MMTC+1); movie->camera: (MMTC+1) ...
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... TVMODE D3 VISTATUS D2 OSSTATUS D1 MDSTATUS D0 NMSTATUS Bit Name D7...D0 Micronas Subaddress 32 Version of SDA 94XX family: 000: SDA 9400 001: SDA 9401 010: SDA 9402 Subaddress 33 Global motion detection: motion value 1: motion in the picture 0: no motion in the picture Movie mode detection: 1: movie mode ...
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... All voltages listed are referenced to ground (0V, V Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions or at any other condition beyond those indicated in the operational sections of this specification is not implied. Micronas Symbol Min Max ...
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... Clock frequency Low time High time Rise time Fall time I²C bus (All Values Are Referred To min(V High-Level Input Voltage Low-Level Input Voltage SCL Clock Frequency Inactive Time Before Start Of Transmission Set-Up Time Start Condition Micronas Symbol Min Nom Max V 3.15 3.3 3. ...
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... SDA/SCL Fall Times Set-Up Time Stop Condition Output valid from clock Input filter spike suppression (SDA and SCL pins) Low-Level Output Current Inputs crystal connections X1/CLK2, X2 Crystal frequency Equivalent parallel Capacitance Equivalent parallel Capacitance Micronas Symbol Min Nom Max t 0.6 HD;STA t 1.3 LOW t 0 ...
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... TTL Outputs: YOUT, UVOUT, HREF, INTERLACED (Referenced To CLKOUT) Hold time Delay time TTL Outputs: HOUT, VOUT (Referenced To CLKOUT) Hold time Delay time TTL Inputs: SYNCEN (Referenced To CLK1) Set-Up Time Input Hold Time Clock concept *: see also on page 37 Micronas Symbol Min Max Unit t.b.d. t.b. µ ...
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... SDA 9400 10 Application information CVBS VPC32xxD Y/C RGB Color Decoder Micronas DDP3310B SDA 9400 Deflection controller SCARABAEUS E/W V-Drive H-Drive Preliminary Data Sheet ...
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... SDA 9400 11 Waveforms 11.1 I²C-bus timing START/STOP 11.2 I²C-bus timing DATA BUS TIMING DATA t f SCL t SU;STA t HD;STA SDA SDA OUT Micronas t HIGH t LOW t t HD;STA SU;DAT SU;STO t BUF Preliminary Data Sheet ...
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... SDA 9400 11.3 Timing diagram clock CLK1 t CLKOUT WH SYNCEN t IH2 Datain t IH Dataout t OH 11.4 Clock circuit diagram X1/CLK2 Cin Micronas SU2 t WH2 Datain Dataout X2 xtal WL2 t t LH2 HL2 Cout Preliminary Data Sheet IH IL ...
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... SDA 9400 12 Package Outlines P-MQFP-64 [All dimensions in mm] Micronas 93 Preliminary Data Sheet ...
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... By this publication, Micronas GmbH does not assume responsibil- ity for patent infringements or other rights of third parties which may result from its use. Further, Micronas GmbH reserves the right to revise this publication and to make changes to its content, at any time, without obligation to notify any person or entity of such revisions or changes. ...