ADC12138 National Semiconductor, ADC12138 Datasheet

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ADC12138

Manufacturer Part Number
ADC12138
Description
Manufacturer
National Semiconductor
Datasheet

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© 2006 National Semiconductor Corporation
ADC12130/ADC12132/ADC12138
Self-Calibrating 12-Bit Plus Sign Serial I/O A/D
Converters with MUX and Sample/Hold
General Description
NOTE: All versions of the ADC12132 are obsolete and
shown here for reference only.
The ADC12130, ADC12132 and ADC12138 are 12-bit plus
sign successive approximation A/D converters with serial I/O
and configurable input multiplexer. The ADC12132 and
ADC12138 have a 2 and an 8 channel multiplexer, respec-
tively. The differential multiplexer outputs and A/D inputs are
available on the MUXOUT1, MUXOUT2, A/DIN1 and A/DIN2
pins. The ADC12130 has a two channel multiplexer with the
multiplexer outputs and A/D inputs internally connected. The
ADC12130 family is tested and specified with a 5 MHz clock.
On request, these A/Ds go through a self calibration process
that adjusts linearity, zero and full-scale errors to typically
less than
The analog inputs can be configured to operate in various
combinations of single-ended, differential, or pseudo-
differential modes. A fully differential unipolar analog input
range (0V to +5V) can be accommodated with a single +5V
supply. In the differential modes, valid outputs are obtained
even when the negative inputs are greater than the positive
because of the 12-bit plus sign output data format.
The ADC12132 is obsolete and described in this document
for reference only.
The serial I/O is configured to comply with NSC MICROW-
IRE
LM4041.
TRI-STATE
COPS
. For voltage references, see the LM4040, LM4050 or
microcontrollers, HPC
®
is a registered trademark of National Semiconductor Corporation.
±
1 LSB each.
and MICROWIRE
are trademarks of National Semiconductor Corporation.
DS012079
Features
n Serial I/O (MICROWIRE, SPI and QSPI Compatible)
n Power down mode
n Programmable acquisition time
n Variable digital output word length and format
n No zero or full scale adjustment required
n 0V to 5V analog input range with single 5V power
Key Specifications
Applications
n Pen-based computers
n Digitizers
n Global positioning systems
Resolution
j
j
j
j
j
supply
12-Bit plus sign conversion time
12-Bit plus sign throughput time
Integral Linearity Error
Single Supply
Power Consumption
+3.3V
+3.3V power down
+5V
+5V power down
3.3V or 5V
12-bit plus sign
±
15 mW (max)
33 mW (max)
100 µW (typ)
8.8 µs (max)
2 LSB (max)
14 µs (max)
www.national.com
40 µW (typ)
April 2006
±
10%

Related parts for ADC12138

ADC12138 Summary of contents

Page 1

... The ADC12130, ADC12132 and ADC12138 are 12-bit plus sign successive approximation A/D converters with serial I/O and configurable input multiplexer. The ADC12132 and ADC12138 have a 2 and an 8 channel multiplexer, respec- tively. The differential multiplexer outputs and A/D inputs are available on the MUXOUT1, MUXOUT2, A/DIN1 and A/DIN2 pins ...

Page 2

... ADC12138 Simplified Block Diagram Connection Diagrams 16-Pin Dual-In-Line and Wide Body SO Packages Top View www.national.com 01207902 Device Obsolete. Shown for reference only. 2 01207901 20-Pin SSOP Package 01207947 Top View ...

Page 3

... ADC12132CIMSA * ADC12132CIMSAX * ADC12138CIN ADC12138CIWM ADC12138CIWMX ADC12138CIMSA ADC12138CIMSA * The ADC12132 is obsolete and shown in this document for reference only. Pin Descriptions CCLK The clock applied to this input controls the suc- cessive approximation conversion time interval and the acquisition time. The rise and fall times of the clock edges should not exceed 1 µ ...

Page 4

Pin Descriptions (Continued) DI This is the serial data input pin. The data ap- plied to this pin is shifted at the rising edge of SCLK into the multiplexer address and mode select register. Table 2 through Table 4 show ...

Page 5

... ADC12130CIN ADC12130CIWM 215˚C ADC12132CIMSA * 220˚C ADC12132CIWM * −65˚C to +150˚C ADC121038CIN ADC121038CIMSA ADC12138CIWM * The ADC12132 is obsolete and is shown for reference only +5V +4.096V, and fully differential input with fixed 2.048V A D REF + = 3.3V 2.5V and fully-differential input with fixed 1.250V common-mode ...

Page 6

Converter Electrical Characteristics The following specifications apply for (V + common-mode voltage voltage), V − = 0V, 12-bit + sign conversion mode, source impedance for analog inputs, V REF 5 MHz, and ...

Page 7

DC and Logic Electrical Characteristics The following specifications apply for (V + common-mode voltage mode voltage), V − = 0V, 12-bit + sign conversion mode, source impedance for analog inputs, V REF ...

Page 8

AC Electrical Characteristics The following specifications apply for (V + common-mode voltage mode voltage), V − = 0V, 12-bit + sign conversion mode, source impedance for analog inputs, V REF = MHz, ...

Page 9

AC Electrical Characteristics The following specifications apply for (V + common-mode voltage mode voltage), V − = 0V, 12-bit + sign conversion mode, source impedance for analog inputs, V REF = f ...

Page 10

AC Electrical Characteristics Note 8: To guarantee accuracy required that the V pin. Note 9: With the test condition for V (V REF REF Note 10: Typical figures are 25˚C and represent most ...

Page 11

AC Electrical Characteristics FIGURE 2. Simplified Error Curve vs. Output Code without Auto-Calibration or Auto-Zero Cycles FIGURE 3. Simplified Error Curve vs. Output Code after Auto-Calibration Cycle (Continued) 11 01207906 01207907 www.national.com ...

Page 12

AC Electrical Characteristics Typical Performance Characteristics calibration unless otherwise specified. Linearity Error Change vs. Clock Frequency Linearity Error Change vs. Reference Voltage www.national.com (Continued) FIGURE 4. Offset or Zero Error Voltage The following curves apply for 12-bit + sign mode ...

Page 13

Typical Performance Characteristics auto-calibration unless otherwise specified. (Continued) Full-Scale Error Change vs. Clock Frequency Full-Scale Error Change vs. Reference Voltage Zero Error Change vs. Clock Frequency The following curves apply for 12-bit + sign mode after Full-Scale Error Change 01207957 ...

Page 14

Typical Performance Characteristics auto-calibration unless otherwise specified. (Continued) Zero Error Change vs. Reference Voltage Analog Supply Current vs. Temperature Digital Supply Current vs. Temperature www.national.com The following curves apply for 12-bit + sign mode after 01207963 Digital Supply Current 01207965 ...

Page 15

Typical Performance Characteristics auto-calibration unless otherwise specified. (Continued) Full-Scale Error Change vs. Temperature Zero Error Change vs. Temperature Analog Supply Current vs. Temperature The following curves apply for 12-bit + sign mode after Full-Scale Error Change 01207969 01207971 Digital Supply ...

Page 16

Typical Dynamic Performance Characteristics mode after auto-calibration unless otherwise specified. Bipolar Spectral Response with 1 kHz Sine Wave Input Bipolar Spectral Response with 20 kHz Sine Wave Input Bipolar Spectral Response with 40 kHz Sine Wave Input www.national.com The following ...

Page 17

Typical Dynamic Performance Characteristics mode after auto-calibration unless otherwise specified. (Continued) Bipolar Spurious Free Dynamic Range Unipolar Signal-to-Noise + Distortion Ratio vs. Input Frequency Unipolar Spectral Response with 1 kHz Sine Wave Input The following curves apply for 12-bit + ...

Page 18

Typical Dynamic Performance Characteristics mode after auto-calibration unless otherwise specified. (Continued) Unipolar Spectral Response with 20 kHz Sine Wave Input Unipolar Spectral Response with 40 kHz Sine Wave Input Test Circuits DO “TRI-STATE” (t www.national.com 01207987 01207989 , t ) ...

Page 19

Test Circuits (Continued) Timing Diagrams DO Falling and Rising Edge Leakage Current 01207915 DO “TRI-STATE” Falling and Rising Edge 01207916 DI Data Input Timing DO Data Output Timing Using CS 19 01207917 01207918 01207919 www.national.com ...

Page 20

... Timing Diagrams (Continued) Note: DO output data is not valid during this cycle. www.national.com DO Data Output Timing with CS Continuously Low ADC12138 Auto Cal or Auto Zero 20 01207920 01207921 ...

Page 21

... Timing Diagrams (Continued) ADC12138 Read Data without Starting a Conversion Using CS ADC12138 Read Data without Starting a Conversion with CS Continuously Low 21 01207922 01207923 www.national.com ...

Page 22

... Timing Diagrams (Continued) ADC12138 Conversion Using CS with 16-Bit Digital Output Format ADC12138 Conversion with CS Continuously Low and 16-Bit Digital Output Format www.national.com 22 01207924 01207925 ...

Page 23

... Timing Diagrams (Continued) ADC12138 Software Power Up/Down Using CS with 16-Bit Digital Output Format ADC12138 Software Power Up/Down with CS Continuously Low and 16-Bit Digital Output Format 23 01207926 01207927 www.national.com ...

Page 24

... Note: Hardware power up/down may occur at any time high while a conversion is in progress that conversion will be corrupted and erroneous data will be stored in the output shift register. ADC12138 Configuration Modification — Example of a Status Read www.national.com ADC12138 Hardware Power Up/Down ...

Page 25

Ceramic or better FIGURE 5. Recommended Power Supply Bypassing and Grounding FIGURE 6. Protecting the MUXOUT1, MUXOUT2, A/DIN1 and A/DIN2 Analog Pins 01207930 25 01207931 www.national.com ...

Page 26

... MSB TABLE 2. ADC12138 Multiplexer Addressing A/D Input Polarity to MUXOUT2 Assignment + − − − + − + − − + − − + − − + − − − + − − ...

Page 27

... − Note: ADC12130 do not have A/DIN1, A/DIN2, MUXOUT1 and MUXOUT2 pins. * ADC12132 is obsolete; shown for reference only. ADC12138 DI0 DI1 DI2 DI3 ADC12130 and DI0 DI1 ADC12132 * See Table 2 or Table 3 See Table 2 or Table 3 See Table 2 or Table 3 ...

Page 28

Format and Set-Up Tables Status Bit DB0 DB1 Location Status Bit PU PD Device Status “High” “High” Function indicates a indicates a Power Up Power Sequence Down is in Sequence progress is in progress www.national.com (Continued) TABLE 6. Status Register ...

Page 29

Application Information 1.0 DIGITAL INTERFACE 1.1 Interface Concepts The example in Figure 7 shows a typical sequence of events after the power is applied to the ADC12130/2/8: FIGURE 7. Typical Power Supply Power Up Sequence The first instruction input to ...

Page 30

... Number DI0 DI1 DI2 DI3 DI4 DI5 DI6 DI7 ADC12130 and ADC12132 * ADC12138 Where X can be a logic high (H) or low (L). * ADC12132 is obsolete; shown for reference only. 1.5 Power Up/Down The ADC may be powered down by taking the PD pin HIGH or by the instruction input on DI (see Table 4 and Table 5, and the Power Up/Down timing diagrams) ...

Page 31

... CONV line is taken high during the I/O sequence. See the Read Data timing diagrams. Table 5 describes the operation of the CONV pin. 2.0 DESCRIPTION OF THE ANALOG MULTIPLEXER For the ADC12138, the analog input multiplexer can be configured with 4 differential channels or 8 single ended channels with the COM input as the zero reference or any 4 Differential ...

Page 32

Application Information For pseudo-differential signed operation, the biasing circuit shown in Figure 12 shows a signal AC coupled to the ADC. This gives a digital output range of −4096 to +4095. With a 2.5V reference, 1 LSB is equal to ...

Page 33

Application Information fier circuits driving the ADC as shown in Figure 13. The value of the resistor pull-up biasing the LM4040-2.5 will depend upon the current required by the op amp biasing circuitry. In the circuit of Figure 13 some ...

Page 34

Application Information 3.0 REFERENCE VOLTAGE The difference in the voltages applied to the V − V defines the analog input span (the difference between REF the voltage applied between two multiplexer inputs or the voltage applied to one of the ...

Page 35

Application Information FIGURE 17. V Operating Range REF 4.0 ANALOG INPUT VOLTAGE RANGE The ADC12130/2/8’s fully differential ADC generate a two’s complement output that is found by using the equation shown below: for (12-bit) resolution the Output Code = Round ...

Page 36

... Shown on the following page is a schematic for an RS232 interface to any IBM and compatible PCs. The DTR, RTS, and CTS RS232 signal lines are buffered via level transla- tors and connected to the ADC12138’s DI, SCLK, and DO pins, respectively. The D flip-flop is used to generate the CS signal. ...

Page 37

... Application Information + + + Note and V on the ADC12138 each have 0.01 µF and 0.1 µF chip caps, and 10 µF tantalum caps. All logic devices are bypassed with 0.1 µ REF caps. The assignment of the RS232 port is shown below Input Address COM1 Output Address A sample program, written in Microsoft QuickBasic, is shown on the next page ...

Page 38

... OUT &H3FC, (&HFE AND INP(&H3FC) OUT &H3FC, (&HFD AND INP (&H3FC) OUT &H3FC, (&HEF AND INP(&H3FC)) 10 LINE INPUT <&ldquo>DI data for ADC12138 (see Mode Table on data sheet)”; DI$ INPUT <&ldquo>ADC12138 output word length (12,13,16 or 17)”; DOL 20 ’SET CS# HIGH OUT & ...

Page 39

... Physical Dimensions inches (millimeters) unless otherwise noted Order Number ADC12130CIWM NS Package Number M16B Order Number ADC12138CIWM NS Package Number M28B 39 www.national.com ...

Page 40

... Physical Dimensions www.national.com inches (millimeters) unless otherwise noted (Continued) Order Number ADC12132CIMSA (obsolete) NS Package Number MSA20 Order Number ADC12138CIMSA NS Package Number MSA28 40 ...

Page 41

... Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Order Number ADC12130CIN NS Package Number N16E Order Number ADC12138CIN NS Package Number N28B 41 www.national.com ...

Page 42

... BANNED SUBSTANCE COMPLIANCE National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned Substances’’ as defined in CSP-9-111S2. ...

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